MPC8540 datasheet(978/1302 Pages) FREESCALE

978 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-54

Freescale Semiconductor

RapidIO Interface

Table 17-46 describes the EPCR1 fields for a type 1 packet format (EPCR0[PFT] = 1).

17.3.2.3.8 EPCR1—Type 2 Packet Format

Figure 17-45 describes the EPCR1 for a type 2 packet format (EPCR0[PFT] = 2).

Figure 17-45. Error Packet Capture Register 1 (EPCR1)—Type 2 Packet Format

Table 17-47 describes the EPCR1 fields for a type 2 packet format (EPCR0[PFT] = 2).

17.3.2.3.9 EPCR1—Type 5 Packet Format

Figure 17-46 describes the EPCR1 for a type 5 packet format (EPCR0[PFT] = 5).

Figure 17-46. Error Packet Capture Register 1 (EPCR1)—Type 5 Packet Format

Table 17-46. EPCR1 Type 1 Field Descriptions

Bits

Name

Description

0–3

TRANS

Transaction field of a packet

4–7

RDSZ

Read size

8–15

STID

Source transaction ID

16–23

SECID

Secondary source ID

24–31

SECTID Secondary transaction ID

15 16

TRANS

RDSZ

STID

000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_0E14

Table 17-47. EPCR1

Type 2 Field Descriptions

Bits

Name

Description

0–3

TRANS Transaction field of a packet

4–7

RDSZ

Read size

8–15

STID

Source transaction ID

16–31

—

Reserved

15 16

TRANS

WRSZ

STID

000

0000

000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_0E14

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