MPC8540 datasheet(980/1302 Pages) FREESCALE

980 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-56

Freescale Semiconductor

RapidIO Interface

Table 17-50 describes EPCR1 fields for a type 8 request packet format (EPCR0[PFT] = 8 and

EPCR1[TRANS] = 0 or 1).

17.3.2.3.12EPCR1—Type 8 Response Packet Format

Figure 17-49 describes the EPCR1 for a type 8 response packet format (EPCR0[PFT] = 8 and

EPCR1[TRANS] = 2 or 3).

Figure 17-49. Error Packet Capture Register 1 (EPCR1)—Type 8 Response Packet Format

Table 17-51 describes the fields of the EPCR1 for a type 8 response packet format

(EPCR0[PFT] = 8 and EPCR1[TRANS] = 2 or 3).

17.3.2.3.13EPCR1—Type 10 Packet Format

Figure 17-50 describes the EPCR1 for a type 10 packet format (EPCR0[PFT] = 10).

Table 17-50. EPCR1 Type 8 Request Field Descriptions

Bits

Name

Description

0–3

TRANS

Transaction field of a packet

4–7

RDSZ/WTSZ Read or write size depending on whether it is a maintenance read or write request

8–15

STID

Source transaction ID

16–31

—

Reserved

15 16

TRANS

STAT

STID

000000

0000000

000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_0E14

Table 17-51. EPCR1 Type 8 Response Field Descriptions

Bits

Name

Description

0–3

TRANS Transaction field of a packet

4–7

STAT

Status field of a packet

8–15

STID

Source transaction ID

16–31

—

Reserved

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