MPC8540 datasheet(981/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

17-57

Figure 17-50. Error Packet Capture Register 1 (EPCR1)—Type 10 Packet Format

Table 17-52 describes EPCR1 fields for a type 10 packet format (EPCR0[PFT] = 10).

17.3.2.3.14EPCR1—Type 11 Packet Format

Figure 17-51 describes the EPCR1 for a type 11 packet format (EPCR0[PFT] = 11).

Figure 17-51. Error Packet Capture Register 1 (EPCR1)—Type 11 Packet Format

Table 17-53 describes EPCR1 fields for a type 11 packet format (EPCR0[PFT] = 11).

15 16

R 000

000

STID

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_0E14

Table 17-52. EPCR1 Type 10 Field Descriptions

Bits

Name

Description

0–7

—

Reserved

8–15

STID Source transaction ID

16–31

—

Reserved

15 16

MSLEN

SSZ

LET

MBOX

MSSEG

00000

000000

0000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_0E14

Table 17-53. EPCR1 Type 11 Field Descriptions

Bits

Name

Description

0–3

MSLEN

Message length field of a packet

4–7

SSZ

Segment size field of a packet

8–9

LET

Letter field of a packet

10–11

MBOX

Mailbox field of a packet

12–15

MSSEG Message segment field of a packet

16–31

—

Reserved

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