MPC8540 datasheet(1036/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-112

Freescale Semiconductor

RapidIO Interface

direct mode, software programs the necessary registers to point to the beginning of the message in

memory. In chaining mode, software programs the necessary registers to point to the beginning of

the first valid descriptor in memory. The hardware then reads the descriptor to load all the

necessary registers to start the message transfer.

17.8.4.2.1 Direct Mode Operation

In direct mode, OMR[MUTM] is set and the outbox controller does not read descriptors from

memory, but instead uses the current parameters programmed in the outbox registers to start the

transfer. In direct mode, software is responsible for initializing all the parameters in all the

necessary registers to start the message transmission. The message transfer is started when the

outbox start bit, OMR[MUS], in the outbound mode register transitions from a 0 to 1 and the

outbox is not already busy. Software is expected to program all the appropriate registers before

setting OMR[MUS]. The sequence of events to start and complete a transfer in direct mode is as

follows:

•

Poll the status register message unit busy bit, OSR[MUB], to make sure the message unit

is not busy with a previously initiated message.

•

Initialize the source address (OSAR), destination port (ODPR), destination attributes

(ODATR) and double-word count (ODCR) registers.

•

Initialize the outbound mode register message unit transfer mode bit, OMR[MUTM] = 1,

to indicate direct mode. Other control parameters must also be initialized in the mode

•

Clear, then set the mode register message unit start bit, OMR[MUS], to start the message

transfer.

•

OSR[MUB] is set by the outbox controller to indicate that the message transfer is in

progress.

•

OSR[MUB] is cleared by the outbox controller after the transfer is finished or if a transfer

error occurs.

•

An end of message interrupt is generated if ODATR[EOMIE] is set.

17.8.4.2.2 Chaining Mode Operation

In chaining mode, OMR[MUTM] = 0 in the outbound mode register, and message descriptors are

built in local memory in a circular queue. Two options are available to the programmer in chaining

mode: normal mode and list mode. In normal mode, software can initialize the outbox controller

registers and then build the descriptors in memory. ODQEPAR is maintained and incremented by

hardware, but the increment is controlled by software. Software should build descriptors in

memory using the enqueue pointer address and can have the hardware increment the enqueue

pointer by writing OMR[MUI] to a value of 1. Software can then read the value of the enqueue

pointer to write the next descriptor in memory and then increment the enqueue pointer by writing

MPC8540 Datasheet(PDF) 1036 Page - Freescale Semiconductor, Inc

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