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MPC8540 Datasheet(PDF) 1043 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 1043 Page - Freescale Semiconductor, Inc

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RapidIO Message Unit
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
17-119
17.8.4.3.4 Data Message Controller Limitations and Restrictions
This section describes some of the limitations and restrictions of the data message controller. This
is intended to help software maximize the message passing performance and avoid programming
errors.
Software must guarantee that the enqueue pointer is not pointing to an invalid descriptor in
chaining mode if the enqueue and dequeue pointers are not equal.
17.8.4.4 Doorbell Message Controller
The RapidIO protocol supports a doorbell message type that contains no data payload. Even
though the RapidIO architecture references outbound and inbound doorbell message controllers,
the RapidIO controller supports only an inbound doorbell message queue. Outbound doorbells are
generated outside RapidIO within the outbound ATMU. Inbound doorbell messages are handled
by the doorbell message controller similar to how the data message controller handles inbound
data messages. The doorbell controller receives the doorbell message and places it in a circular
queue located in the local memory.
Figure 17-85 shows an example of the structure of the inbound doorbell queue and its pointers.
The doorbell queue of the RapidIO controller has eight entries, three of which are currently valid.
The doorbell controller adds doorbell information to the head of the queue and the processor core
removes it from the tail.
The doorbell entry size is fixed at 64 bits because doorbell packets only pass a small amount of
information, making the enqueue and dequeue pointers double-word addresses.
Figure 17-85. Inbound Doorbell Queue and Pointer Structure
Doorbell
Entry
Doorbell
Entry
Doorbell
Entry
Enqueue pointer
Dequeue pointer
Dequeue pointer
Processor Core Read
Inbound
Doorbell
Controller
Local Memory
Packets from
RapidIO interface



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