MPC8540 datasheet(1085/1302 Pages) FREESCALE

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Memory Map and Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

19-7

Figure 19-5 shows the performance monitor local control B0 register (PMLCB0).

Figure 19-5. Performance Monitor Local Control Register B0 (PMLCB0)

Table 19-5 describes PMLCB0 fields.

Condition enable

0 Overflow conditions for PMCn cannot occur (PMCn cannot cause interrupts or freeze counters).

Should be cleared when PMCn is used as a trigger or is selected for chaining.

1 Overflow conditions occur when PMCn[msb] is set.

6–8

—

Reserved

9–15

EVENT Event selector. Up to 128 events selectable. See Table 19-10 for definition of events.

16–20

BSIZE

Burst size. Fewest event occurrences that constitute a burst, that is, a rapid sequence of events

followed by a relatively long pause. A value less than two implies regular event counting. Any

non-threshold, regular event may be counted in a bursty fashion. See Section 19.4.6, “Burstiness

Counting,” for more information.

21–25

BGRAN Burst granularity. The maximum number of clock cycles between events that are considered part of

a single burst. See Section 19.4.6, “Burstiness Counting.”

26–31

BDIST

Burst distance (used with TBMULT). The number of clock cycles between bursts. Must be set to a

value greater than BSIZE for proper burstiness counting behavior.

00_0000 Regular counting

R0 0

TRIGONSEL

TRIGOFFSEL TRIGONCNTL TRIGOFFCNTL

0 000 000 000 000 00 0

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xE_1014

Table 19-5. PMLCB0 Field Descriptions

Bits

Name

Description

0–1

—

Reserved

2–5

TRIGONSEL

Trigger-on select. The number of the counter that starts event counting. When the specified

counter’s TRIGONCNTL event overflows, the current counter begins counting. No triggering

occurs if the value is self-referential, that is, when set to the current counter number.

6–7

—

Reserved

8–11

TRIGOFFSEL

Trigger-off select. The number of the counter that stops event counting. When the specified

counter’s TRIGONCNTL event overflows, the current counter stops counting. No triggering

occurs if the value is self-referential, that is, when set to the current counter number.

Table 19-4. PMLCA1–PMLC8 Field Descriptions (continued)

Bits

Name

Description

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