MPC8540 datasheet(1086/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

19-8

Freescale Semiconductor

Performance Monitor

Figure 19-6 shows performance monitor local control registers B1–B8.

Figure 19-6. Performance Monitor Local Control Registers B1–B8 (PMLCB1–PMLCB8)

Table 19-5 describes PMLCBn fields.

12–13

TRIGONCNTL

Trigger-on control. Indicates the condition under which triggering to start counting occurs

00 Trigger off (no triggering to start)

01 Trigger on change

10 Trigger on overflow

11 Reserved

14–15

TRIGOFFCNTL Trigger-off control. Indicates the condition under which triggering to stop occurs

00 Trigger off (no triggering to stop)

01 Trigger on change

10 Trigger on overflow

11 Reserved

16–31

—

Reserved

20 21

23 24 25

R0 0

TRIGONSEL

TRIGOFFSEL TRIGONCNTL TRIGOFFCNTL

0 000 0

TBMULT

THRESHOLD

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xE_1024, 0xE_1034, 0xE_1044, 0xE_1054, 0xE_1064, 0xE_1074, 0xE_1084, 0xE_1094

Table 19-6. PMLCBn Field Descriptions

Bits

Name

Description

0–1

—

Reserved

2–5

TRIGONSEL

Trigger-on select. Set this field equal to the number of the counter that should trigger event

counting to start. When the specified counter’s TRIGONCNTL event overflows, the current

counter begins counting. No triggering occurs when TRIGONSEL = current counter.

6–7

—

Reserved

8–11

TRIGOFFSEL

Trigger-off select. Set this field equal to the number of the counter that should trigger event

counting to stop. When the specified counter’s TRIGONCNTL event overflows, the current

counter stops counting. No triggering occurs when TRIGOFFSEL = current counter.

12–13

TRIGONCNTL

Trigger-on control. Indicates the condition under which triggering to start counting occurs

00 Trigger off (no triggering to start)

01 Trigger on change

10 Trigger on overflow

11 Reserved

Table 19-5. PMLCB0 Field Descriptions (continued)

Bits

Name

Description

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