MPC8540 datasheet(1098/1302 Pages) FREESCALE

1098 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

19-20

Freescale Semiconductor

Performance Monitor

ECM e500 direct read bus beat

Ref:17

—

ECM e500 direct read bus beat

forwarded

C2:24

ECM direct read bus beat forwarded directly to e500 R1

data bus

ECM cancel

Ref:18

—

Interrupt Controller (PIC) Events

PIC total interrupt count

Ref:26

Total number of interrupts serviced

PIC interrupt wait cycles

C8:62

Counts cycles when an interrupt waits to be acknowledge

PIC interrupt service cycles

C2:19

Number of cycles there is an interrupt currently being

serviced

PIC interrupt select 0 (duration

threshold)

C1:56

THRESHOLD: select 0–3: interrupt count over threshold.

(Note: only unmasked, nonzero priority requests are

acknowledged). The four interrupts are selected through

“Performance Monitor Mask Registers (PMMRs).”

PIC interrupt select 1 (duration

threshold)

C3:59

PIC interrupt select 2 (duration

threshold)

C5:55

PIC interrupt select 3 (duration

threshold)

C6:60

PCI/PCI-X Common Events

PCI/PCI-X clock cycles

Ref:28

—

PCI/PCI-X inbound memory reads

C1:62

Includes all read types

PCI/PCI-X inbound memory writes

C2:37

—

PCI/PCI-X inbound config reads

C3:63

—

PCI/PCI-X inbound config writes

C4:37

—

PCI/PCI-X outbound memory reads

C5:30

Includes all read types

PCI outbound memory writes/PCI-X

outbound memory writes attempted

C6:32

Number of PCI outbound memory writes or number of

PCI-X outbound memory writes attempted

PCI/PCI-X outbound I/O reads

C3:37

—

PCI/PCI-X outbound I/O writes

C4:38

—

PCI outbound config reads/PCI-X

outbound config reads attempted

C7:26

Number of PCI outbound config reads OR number of PCI-X

outbound config reads attempted

PCI/PCI-X outbound config writes

C8:26

—

PCI/PCI-X inbound total read data

beats

C5:32

Includes 32- and 64-bit transactions

PCI/PCI-X inbound total write data

beats

C6:34

Includes 32- and 64-bit transactions

PCI/PCI-X outbound total read data

beats

C7:28

Includes 32- and 64-bit transactions

Table 19-10. Performance Monitor Events (continued)

Event Counted

Number

Description of Event Counted

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