MPC8540 datasheet(1127/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

20-21

Table 20-18 describes the TBTMR field.

20.3.2.5 Trace Buffer Status Register (TBSR)

The trace buffer status register (TBSR) shown in Figure 20-13 indicates the operational state of

the trace buffer.

Table 20-19 describes the TBSR fields.

Table 20-18. TBTMR Field Descriptions

Bits

Name

Description

0–31

TBTM Trace buffer transaction mask. Each bit corresponds to a transaction type as defined in Table 20-12. The

transaction associated with a bit depends on the interface being monitored. A value of 1 for a given mask

bit enables the matching of the transaction associated with that bit. These bits are meaningful only when

TBCR0[TMD]=0.

012

23 24

ACT TRIG STP WRAP

0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0

C_INDX

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xE_205C

Figure 20-13. Trace Buffer Status Register (TBSR)

Table 20-19. TBSR Field Descriptions

Bits

Name

Description

ACT

Active. Indicates trace buffer activity

0 The start triggering event has not yet occurred. Trace buffer is not armed

1 The start triggering event has occurred. Trace buffer is armed.

TRIG

Triggered. Indicates whether or not a programmed event has been triggered

0 The programmed event in TBCR0 has not yet been triggered.

1 The programmed event in TBCR0 has been triggered at least once.

STP

Stopped. Indicates whether or not a trace buffer stop condition has been detected.

0 No stop condition yet detected

1 The trace buffer has detected a stop condition and is no longer capturing events.

WRAP

Wrapped. Indicates that the trace buffer write pointer has wrapped to the beginning of the buffer at

least once. Set when the last entry of the trace buffer is written

0 Pointer has not yet wrapped

1 Pointer has wrapped to the beginning at least once

4–23

—

Reserved

24–31 C_INDX Current index. Represents the current value of the write pointer at the time TBSR was read. This

value may be written by software to initialize the write pointer; however, software is not allowed to

write the write pointer while the trace buffer is active. Writes are ignored while the trace buffer is

active. It is recommended to write the status register before enabling the trace buffer in order to zero

out any bits that might have been set during a prior run and to initialize the write pointer to zero.

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