MPC8540 datasheet(1131/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

20-25

Table 20-24 describes the CCIDR field.

20.3.4 Trigger Out Function

TRIG_OUT provides a convenient mechanism for triggering external system monitors and

diagnostic equipment such as logic analyzers. Note that READY is multiplexed with TRIG_OUT.

See the last paragraph of Section 4.4.2, “Power-On Reset Sequence,” for more information about

READY functionality.

When the trace buffer hit is selected by TOSR[SEL], TRIG_OUT is only meaningful if the trace

buffer control register 0 (TBCR0) is properly configured to hit on a traceable event. The same

holds true for the watchpoint monitor when the watchpoint monitor is selected by TOSR[SEL].

20.3.4.1 Trigger Out Source Register (TOSR)

The trigger out source register (TOSR) shown in Figure 20-19 specifies the source for

TRIG_OUT. The three event-trigger sources are the following:

•

The watchpoint monitor

•

The trace buffer

•

The performance monitor

Table 20-24. CCIDR Field Descriptions

Bits

Name

Description

0–31

CCID Current context ID. Set by user software. Typically loaded immediately following a context switch.

Compared with user-programmed context ID for context-sensitive event triggering.

R 0

SEL

SYNC

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xE_20B0

Figure 20-19. Trigger Out Source Register (TOSR)

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