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MPC8540 Datasheet(PDF) 1130 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 1130 Page - Freescale Semiconductor, Inc |
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1130 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 20-24 Freescale Semiconductor Debug Features and Watchpoint Facility 20.3.3 Context ID Registers This section describes the context ID registers. The current context ID register (CCIDR) and programmed context ID registers (PCIDR) are set by software and facilitate debugging complex software. 20.3.3.1 Programmed Context ID Register (PCIDR) The programmed context ID register (PCIDR), shown in Figure 20-17, contains the user-programmed context ID. This register can be configured to trigger watchpoint events when its value matches the current context ID register (CCIDR), as controlled by WMCR0[ECEN] and WMCR0[NECEN]. See Section 20.3.1.1, “Watchpoint Monitor Control Registers 0–1 (WMCR0, WMCR1),” for more information. Table 20-23 describes the PCIDR field. 20.3.3.2 Current Context ID Register (CCIDR) The current context ID register (CCIDR) shown in Figure 20-18 contains the current context ID. This register is written by software after a context switch and can be used to trigger events when compared with the programmed context ID register (PCIDR). 0 31 R PCID W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset 0xE_20A0 Figure 20-17. Programmed Context ID Register (PCIDR) Table 20-23. PCIDR Field Descriptions Bits Name Description 0–31 PCID Programmed context ID. Contains the user-programmed context ID. Compared with current context ID for context-sensitive event triggering. 0 31 R CCID W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset 0xE_20A4 Figure 20-18. Current Context ID Register (CCIDR) |
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