MPC8540 datasheet(1123/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

20-17

Table 20-14 describes the TBCR0 fields.

AMD

TMD ECEN NECEN SIDEN TIDEN HALT

MODE

Reset

0000_0000_0000_0000

STRT

STOP

Reset

0000_0000_0000_0000

Offset

0xE_2040

Figure 20-8. Trace Buffer Control Register 0 (TBCR0)

Table 20-14. TBCR0 Field Descriptions

Bits

Name

Description

Enable

0 The trace buffer facility is disabled.

1 The trace buffer facility is enabled.

AMD

Address match disable

0 The address match is used to qualify a trace buffer event.

1 The address match is ignored when detecting a trace buffer event.

TMD

Transaction match disable

0 The transaction type match is used to qualify a trace buffer event.

1 The transaction type match is ignored when detecting a trace buffer event.

ECEN

Equal context enable. Qualifies the matching of current context with programmed context as a trace buffer

event criterion, as written in the context registers described in Section 20.3.3, “Context ID Registers.”

0 Current context match does not affect trace buffer event detection.

1 Trace buffer events are qualified by comparing current context with the programmed context event value.

Note: ECEN and NECEN must not be enabled in the same run. If both are set, watchpoint events are

inhibited (never occur).

NECEN Not equal context enable. Qualifies the matching of current context with programmed context as a trace buffer

event criterion, as written in the context registers described in Section 20.3.3, “Context ID Registers.”

0 The failure of a current context match does not affect trace buffer event detection

1 trace buffer events are qualified with NOT getting a current context compare with the programmed context

event value.

Note: ECEN and NECEN must not be enabled in the same run. If both are set, watchpoint events are

inhibited (never occur).

SIDEN

Source ID enable

0 Trace buffer events ignore the programmed source ID value.

1 Trace buffer events are qualified by comparison with the programmed SID event value.

TIDEN

Target ID enable

0 Trace buffer events ignore the programmed TID event value.

1 Trace buffer events are qualified by comparison with the programmed TID event value. This comparison

only applies when the ECM is selected for tracing (TBCR1[IFSEL] is all zeros).

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