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MPC8540 Datasheet(PDF) 1177 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 1177 Page - Freescale Semiconductor, Inc

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Memory Map/Register Definition
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
21-37
back-off (BEB) algorithm. Following this back-off time, the packet is retried. The back-off time
can be skipped if configured via the half-duplex register. However, this is non-standard behavior
and its use must be carefully applied. Should any one packet experience excessive collisions, the
packet is aborted. The system flushes the frame and move to the next one in line. If the system
requests to send a packet while the FEC is deferring to a carrier, the FEC simply waits until the
end of the carrier event and the timing of IPG before it honors the request.
When packet transmission attempts experience collisions, the FEC outputs the jam sequence and
waits some amount of time before retrying the packet. This amount of time is determined by a
controlled randomization process called truncated binary exponential back-off. The amount of
time is an integer number of slot times. The number of slot times to delay before the nth
retransmission attempt is chosen as a uniformly distributed random integer r in the range:
0
≤ r ≤ 2k, where k = min(n,10).
So, after the first collision, FEC backs-off either 0 or 1 slot times. After the fifth collision, the FEC
backs-off between 0 and 32 slot times. After the tenth collision, the maximum number of slot times
to back-off is 1024. This can be adjusted via the half-duplex register. An alternate truncation point,
such as 7 for instance, can be programmed. On average, the MAC is be more aggressive after 7
collisions than other stations on the network.
21.5.3.5.4 Controlling Packet Flow
Packet flow can be dealt with in a number of ways with the FEC. A default retransmit attempt limit
of 15 can be reduced using the half-duplex register. The slot time or collision window can be used
to gate the retry window and possibly reduce the amount of transmit buffering within the system.
The slot time for 10/100 Mbps is 512 bit times. Since the slot time begins at the beginning of the
packet, the end occurs around the 56th byte of the frame data.
Full-duplex flow control is provided for in IEEE 802.3x. Currently the standard does not address
flow control in half-duplex environments. Common in the industry, however, is the concept of
back pressure. The FEC implements the optional back pressure mechanism using the raise carrier
method. When the system receive logic wants to stop the reception of packets in a
network-friendly way, transmit half-duplex flow control (THDF) is asserted (TCTRL[THDF]). If
the medium is idle, the FEC raises carrier by transmitting preamble. Other stations on the
half-duplex network then defer to the carrier.
In the event the preamble transmission happens to cause a collision, the FEC ensures the minimum
96-bit presence on the wire, then drops preamble and waits a back-off time depending on the value
of the configuration bit back pressure no back-off (half-duplex) [BPNB]. These
transmitting-preamble-for-back pressure collisions are not counted. When BPBN is asserted, the
FEC waits an inter-packet gap before resuming the transmission of preamble following the
collision and does not defer. If deasserted, the FEC adheres to the truncated BEB algorithm that
allows packets to be received. This also can be detrimental in that packets can now experience
excessive collisions causing them to be dropped in the stations from which they originate. To



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