MPC8540 datasheet(1175/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

21-35

21.5.3.4.6 Receive Buffer Descriptor Pointer Register (RBPTR)

RBPTR, shown in Figure 21-28, contains the receive buffer descriptor address. It takes on the

value of RBASE when the RBASE register is written by software.

Table 21-27 describes the fields of the RBPTR register.

21.5.3.4.7 Receive Descriptor Base Address Register (RBASE)

RBASE, shown in Figure 21-29, is written by the user with the RxBD base address and must be

divisible eight for the 8-byte buffer descriptors.

Table 21-28 describes the fields of the RBASE register.

28 29

RBPTR

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x2_6384

Figure 21-28. Receive Buffer Descriptor Pointer Definition

Table 21-27. RBPTR Field Descriptions

Bits

Name

Description

0–28

RBPTR

The RBPTR register is internally written by the DMA module. The value increments by eight

(bytes) each time a descriptor is read from memory.

29–31

—

Reserved

28 29

RBASE

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x2_6404

Figure 21-29. RBASE Register Definition

Table 21-28. RBASE Field Descriptions

Bits

Name

Description

0–28

RBASE

Receive base. RBASE defines the starting location in the memory map for the FEC RxBD. This

field must be 8-byte aligned.

29–31

—

Reserved

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