MPC8540 datasheet(1182/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

21-42

Freescale Semiconductor

10/100 Fast Ethernet Controller

Table 21-32 describes the fields of the HAFDUP register.

21.5.3.6.5 Maximum Frame Length Register (MAXFRM)

The MAXFRM register is written by the user. Figure 21-34 describes the MAXFRM register.

Table 21-32. HAFDUP Field Descriptions

Bits

Name

Description

0–7

—

Reserved

8–11

Alternate BEB

Truncation

Used when alternate binary exponential back-off enable is set. The value programmed is

substituted for the Ethernet standard value of ten.

Alt BEB

Setting this bit configures the Tx MAC to use the alternate binary exponential back-off

truncation setting instead of the 802.3 standard tenth collision. The standard specifies that any

collision after the tenth uses 210 – 1 as the maximum back-off time. Clearing this bit causes

the Tx MAC to follow the standard binary exponential back-off rule.

BP No BackOff Setting this bit configures the Tx MAC to immediately retransmit, following a collision, during

back pressure operation. Clearing this bit causes the Tx MAC to follow the binary exponential

back-off rule.

No BackOff

Setting this bit configures the Tx MAC to immediately retransmit following a collision. Clearing

this bit causes the Tx MAC to follow the binary exponential back-off rule.

Excess Defer

Setting this bit configures the Tx MAC to allow the transmission of a packet that was

excessively deferred. Clearing this bit causes the Tx MAC to abort the transmission of a packet

that was excessively deferred.

16–19 Retransmission

Maximum

Specifies the number of retransmission attempts following a collision before aborting the

packet due to excessive collisions. The standard specifies the attempt limit to be 0xF (15d),

which is the default.

20–25

—

Reserved

26–31

Collision

Window

The slot time or collision window during which collisions occur in properly configured networks.

Because the window starts at the start of transmission, the preamble and SFD are included.

Its default of 0x37 (55d) corresponds to the count of frame bytes at the end of the window.

015 16

R 0

000

Maximum Frame

Reset

0000_0000_0000_0000_0000_0110_0000_0000

Offset

0x2_6510

Figure 21-34. Maximum Frame Length Register Definition

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