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MPC8540 Datasheet(PDF) 1226 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 1226 Page - Freescale Semiconductor, Inc |
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1226 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 A-14 Freescale Semiconductor Revision History 10.2.2, 10-7 In Table 10-5, delete the last sentence in the Timing/Negation section for IRQ[0:11] signals about edge-sensitive interrupts. 10.3.5.3, 10-29 Append the last sentence of the first paragraph to read: “Reading the corresponding message register or writing a 1 to a status bit clears the corresponding message interrupt and the status bit.” 10.3.7, 10-36 In Table 10-35, correct the who am I register name from “WHOAMI0” to “WHOAMI.” 10.4.1, 10-41 Add the following new paragraph after the first paragraph: “Note that the IPR, IS, and IRR are internal registers that are not accessible to the programmer.” |
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