MPC8540 datasheet(1245/1302 Pages) FREESCALE

1245 / 1302 page

Changes From Revision 0 to Revision 1

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

A-33

Example: Configuration sequence, 4-byte data write to PCI/X register at

address offset 0x14 of Device 1 on PCI/X bus 0.

Initial values:

r0 contains 0x8000_0814

contains

CCSRBAR

0x0_8000

(Address

PCI

CFG_ADDR

contains

CCSRBAR

0x0_8004

(Address

PCI

CFG_DATA

r3 contains 0x1122_3344

Code sequence:

stw r0, 0 (r1)// Update PCI CFG_ADDR register to point to

//register offset 0x14 of device 1.

stwbrx r3, 0 (r2)

Results:

Address CCSRBAR + 0x0_8000 contains 0x8000_0814

Example: Configuration sequence, 2-byte data write to PCI register at

address offset 0x1C of Device 1 on PCI/X bus 0.

Initial values:

r0 contains 0x8000_081C

r1 contains CCSRBAR + 0x0_8000

r2 contains CCSRBAR + 0x0_8004

r3 contains 0xDDCC_BBAA

Code sequence:

stw r0, 0 (r1)

sthbrx r3, 0 (r2)

Results:

Address CCSRBAR + 0x0_8000 contains 0x8000_081C

16.4.2.11.3 PCI Configuration in Agent and Agent Lock Modes

In general, agents should not access the configuration space of other

external PCI devices. Configuration of agents is a function usually reserved

for the host. When the MPC8540 is in agent mode, it responds to remote

host-generated PCI/X configuration cycles. This occurs when a

configuration command is decoded along with the IDSEL input signal being

asserted. When the MPC8540 is in agent lock mode, it retries all

externally-generated PCI/X configuration cycles until the ACL bit in the

PCI bus function register (0x44) is set. See Section 16.5.1, “Power-On

Reset Configuration Modes,” for more information.

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