MPC8540 datasheet(1249/1302 Pages) FREESCALE

1249 / 1302 page

Changes From Revision 0 to Revision 1

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

A-37

16.5.4, 16–95

Add the following new section:

16.5.4 PCI-X Inbound Reads that Cross Window Boundaries

For Rev. 1 of the MPC8540, inbound PCI-X read requests can cross a

window boundary. For Rev. 2, if an inbound PCI-X read request crosses a

window boundary, the MPC8540 responds with a split completion message

indicating an error but does not return any data. This is a deviation from the

PCI-X specification which describes that data is returned up to the window

boundary.

16.5.5, 16–95

Add the following new section:

16.5.5 Bridging Between RapidIO and PCI/X

The MPC8540 does not support bridging from RapidIO according to the

RapidIO Interoperability Specification. If an external RapidIO device tries

to target the MPC8540 with a RapidIO NWRITE-R transaction or with any

RapidIO write at a priority level higher than 0, and the RapidIO inbound

ATMU routes the transaction to the PCI/PCI-X interface, the MPC8540

could deadlock internally.

Therefore, the use of RapidIO NWRITE-R transactions must be avoided in

bridging applications to the PCI/X controller, and all RapidIO writes

targeting the PCI/X controller must be of priority level 0. This means

transaction ordering is relaxed because read responses will not necessarily

push posted writes in the bridge, and writes will never bypass read requests.

Note that this specifically precludes the topology where two MPC8540s

communicating with each other via PCI or PCI-X may deadlock when two

RapidIO devices (one on each MPC8540) are simultaneously performing

priority-1 writes to targets on the remote MPC8540 through the PCI/X link

between the devices. To support such a topology, RapidIO write

transactions that bridge to the other MPC8540 must be priority 0.

17.3, 17-9–2-13

In Table 17-6, correct the access designation for all RapidIO Registers listed

as “Special” to “R/W”.

MPC8540 Datasheet(PDF) 1249 Page - Freescale Semiconductor, Inc