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MPC8540 Datasheet(PDF) 1269 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 1269 Page - Freescale Semiconductor, Inc |
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1269 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor Glossary-11 Synchronization. A process to ensure that operations occur strictly in order. See Context synchronization. Synchronous exception. An exception that is generated by the execution of a particular instruction or instruction sequence. There are two types of synchronous exceptions, precise and imprecise. System memory. The physical memory available to a processor. T Time-division multiplex (TDM). A single serial channel used by several channels taking turns. Tenure. The period of bus mastership. There can be separate address bus tenures and data bus tenures. TLB (translation lookaside buffer). A cache that holds recently-used page table entries. Throughput. The measure of the number of instructions that are processed per clock cycle. Transaction. A complete exchange between two bus devices. A transaction is typically comprised of an address tenure and one or more data tenures, which may overlap or occur separately from the address tenure. A transaction may be minimally comprised of an address tenure only. Transfer termination. Signal that refers to both signals that acknowledge the transfer of individual beats (of both single-beat transfer and individual beats of a burst transfer) and to signals that mark the end of the tenure. U User mode. The operating state of a processor used typically by application software. In user mode, software can access only certain control registers and can access only user memory space. No privileged operations can be performed. Also referred to as problem state. V Virtual address. An intermediate address used in the translation of an effective address to a physical address. Virtual memory. The address space created using the memory management facilities of the processor. Program access to virtual memory is possible only when it coincides with physical memory. |
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