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MPC8540 Datasheet(PDF) 1275 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 1275 Page - Freescale Semiconductor, Inc |
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1275 / 1302 page ![]() R–R MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor Index 1-5 PLMRESPCSR (RapidIO port link maintenance response command and status register), 17-30 PLTOCCSR (RapidIO port link time-out control command and status register), 17-27 PMBH0CSR (RapidIO 8/16 LP-LVDS port maintenance block header 0 command and status register), 17-27 PMCn (performance monitor counters 0–8), 19-9 PMGC0 (performance monitor global control register 0), 19-5 PMLCA0 (performance monitor local control register A0), 19-6 PMLCAn (performance monitor local control registers A1–A8), 19-6 PMLCB0 (performance monitor local control register B0), 19-7 PMLCBn (performance monitor local control registers B1–B8), 19-8 PMnMR0 (PIC performance monitor 0–3 mask registers (lower)), 10-29 PMnMR1 (PIC performance monitor 0–3 mask registers (upper)), 10-30 PMUXCR (alternate function signal multiplex control), 18-12 PNFEDiR (RapidIO port notification/fatal error disable register), 17-47 PNFEDR (RapidIO port notification/fatal error detect register), 17-44 PNFEIER (RapidIO port notification/fatal error interrupt enable register), 17-49 PORBMSR (POR boot mode status register), 4-14, 4-15, 4-16, 18-5 PORDBGMSR (POR debug mode status register), 4-20, 4-21, 18-9 PORDEVSR (POR I/O device status register), 4-16, 4-17, 4-18, 4-19, 4-20, 18-7 PORIMPSCR (POR I/O impedance status and control register), 4-19, 18-6 PORPLLSR (POR PLL ratio status register), 4-12, 4-13, 18-4 POTARn (PCI/X outbound translation address registers 0–4), 16-21 POTEARn (PCI/X outbound translation extended address registers 0–4), 16-21 POWARn (PCI/X outbound window attributes registers 0–4), 16-22 POWBARn (PCI/X outbound window base address registers 0–4), 16-22 POWMGTCSR (power management status and control register), 18-15 PREDR (RapidIO port recoverable error detect register), 17-61 PRTOCCSR (RapidIO port response time-out control command and status register), 17-28 PRTR (RapidIO port retry threshold register), 17-64 PTV (FEC pause time value register), 21-19 PTV (TSEC pause time value register), 14-27 PVR (processor version register), 18-17 PWDCSR (RapidIO port-write and doorbell command and status register), 17-22 PWMR (RapidIO port-write mode register), 17-81 PWQBAR (RapidIO port-write queue base address register), 17-83 PWSR (RapidIO port-write status register), 17-82 R RALN (TSEC receive alignment error counter register), 14-68 RBASE (FEC receive descriptor base address register), 21-35 RBASE (TSEC receive descriptor base address register), 14-45 RBCA (TSEC receive broadcast packet counter register), 14-66 RBDLEN (FEC RxBD data length register), 21-33 RBDLEN (TSEC RxBD data length register), 14-42 RBPTR (FEC receive buffer descriptor pointer register), 21-35 RBPTR (TSEC receive buffer descriptor pointer register), 14-45 RBYT (TSEC receive byte counter register), 14-64 RCDE (TSEC receive code error counter register), 14-69 RCSE (TSEC receive carrier sense error counter register), 14-70 RCTRL (FEC receive control register), 21-31 RCTRL (TSEC receive control register), 14-41 RDRP (TSEC receive dropped packet counter register), 14-72 RFLR (TSEC receive frame length error counter register), 14-69 RFRG (TSEC receive fragments counter register), 14-71 RIWARn (RapidIO inbound window attributes registers 0–4), 17-42 RIWBARn (RapidIO inbound window base address registers 1–4), 17-41 RIWTARn (RapidIO inbound window translation address registers 0–4), 17-40 RJBR (TSEC receive jabber counter register), 14-72 RMCA (TSEC receive multicast packet counter register), 14-66 ROVR (TSEC receive oversize packet counter register), 14-71 ROWARn (RapidIO outbound window attributes registers 0–8), 17-39 ROWBARn (RapidIO outbound window base address registers 1–8), 17-38 |
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