TLS2205 datasheet(8/31 Pages) TI

8 / 31 page

SLFS040

– DECEMBER 1993

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

voltage monitor

The TLS2205 voltage-monitor circuit is designed to monitor the voltage of the system

’s 5-V power supply. The

device has an internal lockout threshold voltage of 4 V. If the power supply drops below 4 V, an internal fault is

generated and PORN goes low. In applications where a more accurate threshold is desired (greater than 4 V),

an external resistor divider may be connected to UV. If UV is not used, it must be tied to VCC (refer to

Figure 1). The following equations can be used to determine the voltage divider resistor values:

VCC(trip) = 1.21 / [R2 / (R1 + R2)]

where:

UV sense bias current = 10 nA

R1 is resistor connected from VCC to UV

R2 is resistor connected from UV to ground

VCC(trip) > 4 V

Hysteresis at UV

25 mV

Note:

A capacitor (Cuv1) may be considered for short-duration power loss.

The voltage monitor incorporates a deglitch timing delay circuit for applications where PORN is used to reset

the system

’s microprocessor. A delay can be implemented on PORN by connecting a capacitor between CPOR

and ground. The reset time (see Figure 2) is calculated by using the following equation:

TR = CCPOR

(VCPOR ICPOR)

where:

TR = reset time in seconds

CCPOR = capacitor value in farads

VCPOR = 1 V

ICPOR = 5 A

Figure 1 represents the voltage-monitor circuit, and Figure 2 represents the power-on reset (PORN) timing

diagram. The following is a functional overview of the voltage monitor system. (VCC(trip) = 4.2 V).

Time 1: During startup, Comp1 resets the R-S flip-flop and allows the CCPOR capacitor to start charging. As

the supply voltage increases, VCPOR becomes greater than 1.21 V (band-gap voltage), which allows

Comp2 to pull PORN high, disabling the retract control circuit.

Time 2: Time 2 represents the normal run mode. At this time, the R-S flip-flop is reset, CPOR is high, PORN

is high, and the retract control circuit is disabled.

Time 3: An external fault is generated by the microprocessor (or external device) by pulling PORN low. No other

parts of the voltage-monitor circuit are affected.

Time 4: If the system

’s supply voltage drops below the preset value (VCC(trip) = 4.2 V, see Figure 2), the

R-S flip-flop is set and allows the capacitor across CPOR to discharge. When VCPOR drops below

1.21 V, PORN is pulled low and a fault is generated that triggers the retract control circuit. Once

VCC(trip) increases above the trip level, the R-S flip-flop is reset and CCPOR begins to charge towards

VCC. After TR seconds, the voltage across CCPOR is greater than 1.21 V and the retract control circuit

is disabled along with PORN being pulled high.

Time 5: Time 5 represents the power down/emergency retract mode. If the system

’s supply voltage drops below

the preset value (VCC(trip) = 4.2 V, see Figure 2), the R-S flip-flop is set and allows the capacitor

across CPOR to discharge. When Vcpor drops below 1.21 V, PORN is pulled low and a fault is

generated.

TLS2205 Datasheet(PDF) 8 Page - Texas Instruments

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