MPC8610EC datasheet(45/96 Pages) NXP

45 / 96 page

Electrical Characteristics

MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

2.12.2.2

SSI Receiver Timing with Internal Clock

Table 36 provides the receiver timing parameters with internal clock.

Figure 18 provides the SSI receiver timing with internal clock.

Figure 18. SSI Receiver with Internal Clock Timing Diagram

2.12.2.3

SSI Transmitter Timing with External Clock

Table 37 provides the transmitter timing parameters with external clock.

Table 36. SSI Receiver with Internal Clock Timing Parameters

Parameter

Symbol

Min

Max

Unit

Internal Clock Operation

(Tx/Rx) CK clock period

SS1

81.4

—

(Tx/Rx) CK clock high period

SS2

36.0

—

(Tx/Rx) CK clock rise time

SS3

—

(Tx/Rx) CK clock low period

SS4

36.0

—

(Tx/Rx) CK clock fall time

SS5

—

(Rx) CK high to FS high

SS11

—

15.0

(Rx) CK high to FS low

SS13

—

15.0

SRXD setup time before (Rx) CK low

SS20

10.0

—

SRXD hold time after (Rx) CK low

SS21

—

Table 37. SSI Transmitter with External Clock Timing Parameters

Parameter

Symbol

Min

Max

Unit

External Clock Operation

(Tx/Rx) CK clock period

SS22

81.4

—

(Tx/Rx) CK clock high period

SS23

36.0

—

(Tx/Rx) CK clock rise time

SS24

—

6.0

SSIn_TCK

SSIn_RFS

SSIn_RXD

SS1

SS4

SS2

SS20

SS21

SS11

SS13

(Output)

(Input)

SS3

SS5

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