MPC8610EC datasheet(92/96 Pages) NXP

92 / 96 page

MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2

Package Information

Freescale Semiconductor

4.2

Part Marking

Parts are marked as the example shown in Figure 58.

Figure 58. Part Marking for FC-PBGA Device

Package Information

This section details package parameters and dimensions.

5.1

Package Parameters for the MPC8610

The package parameters are as provided in the following list. The package type is 29 mm × 29 mm, 783 pins. There are two

package options: leaded flip chip-plastic ball grid array (FC-PBGA) and RoHS lead-free (FC-PBGA).

Die size

8.5 mm × 9.7 mm

Package outline

29 mm × 29 mm

Interconnects

783

Pitch

1 mm

Minimum module height

2.18 mm

Maximum module height

2.7 mm

Total capacitor count

23 caps; 100 nF each

For leaded FC-PBGA (package option: PX)

Solder balls

63% Sn 37% Pb

Ball diameter (typical)

0.50 mm

For RoHS lead-free FC-PBGA (package option: VT)

Solder balls

96.5% Sn, 3.5% Ag

Ball diameter (typical)

0.50 mm

MC8610

wxxyyyyMz

TWLYYWW

MMMM

YWWLAZ

YWWLAZ is the assembly traceability code.

MMMM is the M00 (mask) number.

TWLYYWW is the test code.

Note:

MPC8610EC Datasheet(PDF) 92 Page - NXP Semiconductors

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