MPC8610EC datasheet(46/96 Pages) NXP

46 / 96 page

MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2

Electrical Characteristics

Freescale Semiconductor

Figure 19 provides the SSI transmitter timing with external clock.

Figure 19. SSI Transmitter with External Clock Timing Diagram

(Tx/Rx) CK clock low period

SS25

36.0

—

(Tx/Rx) CK clock fall time

SS26

—

6.0

(Tx) CK high to FS high

SS31

–10.0

15.0

(Tx) CK high to FS low

SS33

10.0

—

(Tx) CK high to STXD valid from high impedance

SS37

—

15.0

(Tx) CK high to STXD high/low

SS38

—

15.0

(Tx) CK high to STXD high impedance

SS39

—

15.0

Synchronous External Clock Operation

SRXD setup before (Tx) CK falling

SS44

10.0

—

SRXD hold after (Tx) CK falling

SS45

2.0

—

SRXD rise/fall time

SS46

—

6.0

Table 37. SSI Transmitter with External Clock Timing Parameters (continued)

Parameter

Symbol

Min

Max

Unit

SS45

SS33

SS24

SS26

SS25

SS23

SSIn_TCK

SSIn_TFS

SSIn_TXD

SSIn_RXD

Note: SRXD input in synchronous mode only

SS31

SS22

SS44

SS39

SS38

SS37

SS46

(Input)

(Output)

(Input)

MPC8610EC Datasheet(PDF) 46 Page - NXP Semiconductors

MPC8610EC Datasheet(HTML) 46 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

Datasheet Download

Link URL