LTC4253IGN datasheet(15/32 Pages) LINER

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LTC4253

4253f

OPERATIO

and DRAIN allows the fault timing cycle to be shortened by

accelerating the charging of the TIMER capacitor. The

TIMER pull-up current is increased by 8 • IDRN. Note that

because SENSE > 50mV, TIMER charges CT during this

time, and the LTC4253 will eventually shut down.

Low impedance failures on the load side of the LTC4253

coupled with 48V or more driving potential can produce

current slew rates well in excess of 50A/

µs. Under these

conditions, overshoot is inevitable. A fast SENSE com-

parator with a threshold of 200mV detects overshoot and

pulls GATE low much harder and hence much faster than

the weaker current limit loop. The 100mV/RS current limit

loop then takes over, and servos the current as previously

described. As before, TIMER runs and shuts down LTC4253

when CT reaches 4V.

If CT reaches 4V, the LTC4253 latches off with a 5µA pull-

up current source. The LTC4253 circuit breaker latch is

reset by either pulling the RESET pin active high until

TIMER goes low, pulling UV momentarily low, dropping

the input voltage VIN below the internal UVLO threshold of

8.2V or pulsing TIMER momentarily low with a switch.

Although short-circuits are the most obvious fault type,

several operating conditions may invoke overcurrent pro-

tection. Noise spikes from the backplane or load, input

steps caused by the connection of a second, higher

voltage supply, transient currents caused by faults on

adjacent circuit boards sharing the same power bus or the

insertion of non-hot swappable products could cause

higher than anticipated input current and temporary de-

tection of an overcurrent condition. The action of TIMER

and CT rejects these events allowing the LTC4253 to “ride

out” temporary overloads and disturbances that could trip

a simple current comparator and, in some cases, blow a

fuse.

APPLICATIO S I FOR ATIO

(Refer to Block Diagram)

SHUNT REGULATOR

A fast responding regulator shunts the LTC4253 VIN pin.

Power is derived from -48RTN by an external current

limiting resistor. The shunt regulator clamps VIN to 13V

(VZ). A 1µF decoupling capacitor at VIN filters supply

transients and contributes a short delay at start-up. RIN

should be chosen to accommodate both VIN supply cur-

rent and the drive required for three optocouplers used by

the PWRGD signals. Higher current through RIN results in

higher dissipation for RIN and the LTC4253. An alternative

is a separate NPN buffer driving the optocoupler as shown

in Figure 3. Multiple 1/4W resistors can replace a single

higher power RIN resistor.

INTERNAL UNDERVOLTAGE LOCKOUT (UVLO)

A hysteretic comparator, UVLO, monitors VIN for

undervoltage. The thresholds are defined by VLKO and its

hysteresis VLKH. When VIN rises above 9.2V (VLKO) the

chip is enabled; below 8.2V (VLKO – VLKH) it is disabled and

GATE is pulled low. The UVLO function at VIN should not

be confused with the UV and OV pins. These are com-

pletely separate functions.

UV/OV COMPARATORS

An UV hysteretic comparator detects undervoltage condi-

tions at the UV pin, with the following thresholds:

UV low-to-high (VUVHI) = 3.225V

UV high-to low (VUVLO) = 2.925V

An OV hysteretic comparator detects overvoltage condi-

tions at the OV pin, with the following thresholds:

OV low-to-high (VOVHI) = 6.150V

OV high-to-low (VOVLO) = 5.850V

The UV and OV trip point ratio is designed to match the

standard telecom operating range of 43V to 75V when

connected together as in Figure 2. A divider (R1, R2) is

used to scale the supply voltage. Using R1 = 402k and

R2 = 32.4k gives a typical operating range of 43.2V to

78.4V. The under and overvoltage shutdown thresholds

are then 39.2V and 82.5V. One percent divider resistors

are recommended to preserve threshold accuracy.

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