LTC4253IGN datasheet(16/32 Pages) LINER

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LTC4253

4253f

APPLICATIO S I FOR ATIO

(Refer to Block Diagram)

start the GATE pin if all the interlock conditions except

TIMER are met. Only during the initial timing cycle does OV

condition have an effect of resetting TIMER.

DRAIN

Connecting an external resistor, RD, to this dual function

DRAIN pin allows VOUT (MOSFET drain-source voltage

drop) sensing without it being damaged by large voltage

transients. Below 6.15V, negligible pin leakage allows a

DRAIN low comparator to detect VOUT less than 2.385V

(VDRNL). This, together with the GATE low comparator,

sets the PWRGD flag.

When VOUT > VDRNCL (7V), the DRAIN pin is clamped at

about 7V and the current flowing in RD is given by:

DRN

OUT

DRNCL

≈

−

(1)

This current is scaled up 8 times during a circuit breaker

fault before being added to the nominal 200

µA. This

accelerates the fault TIMER pull-up when the MOSFET’s

drain-source voltage exceeds 7V and effectively shortens

the MOSFET heating duration.

The R1-R2 divider values shown set a standing current of

slightly more than 100

µA and define an impedance at

UV/OV of 30k

Ω. In most applications, 30kΩ impedance

coupled with 300mV UV hysteresis makes the LTC4253

insensitive to noise. If more noise immunity is desired,

add a 1nF to 10nF filter capacitor from UV/OV to VEE.

The separate UV and OV pins can be used for wider

operating range such as 35.5V to 80V range as shown in

Figure 3. Other combinations are possible with different

resistors arrangement.

UV/OV OPERATION

A low input to the UV comparator will reset the chip and

pull the GATE and TIMER pins low. A low-to-high UV

transition will initiate an initial timing sequence if the other

interlock conditions are met. A high-to-low transition in

the UV comparator immediately shuts down the LTC4253,

pulls the MOSFET gate low and resets the three latched

PWRGD signals high.

An overvoltage condition is detected by the OV compara-

tor and pulls GATE low, thereby shutting down the load,

but it will not reset the circuit breaker TIMER and PWRGD

flags. Returning from the overvoltage condition will re-

2.2k

PWRGD1

VIN

VEE

LTC4253

POWER

MODULE 1

PWRGD2

PWRGD3

EN3

EN2

RESET

DRAIN

GATE

SQTIMER

SENSE

TIMER

POWER

MODULE 2

POWER

MODULE 3

RIN

10k

20k(1/4W)/2

PUSH

RESET

516

EN3

4253 F03

EN2

610

Ω

RD 1M

0.02

Ω

IRF530S

FZT857

VIN

18nF

0.33

µF

C1 10nF

CSQ

0.1

µF

CSS 68nF

POWER

MODULE 1

OUTPUT

POWER

MODULE 2

OUTPUT

VIN

100

µF

CIN

µF

32.4k

432k

–48V

GND

SHORT

GND

R10

47k

14k

R4 22k

††

†

†MOC207

Figure 3. –48V/2.5A Application with Wider Operating Range

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