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LTC4253

4253f

APPLICATIO S I FOR ATIO

TIMER

The operation of the TIMER pin is somewhat complex as

it handles several key functions. A capacitor CT is used at

TIMER to provide timing for the LTC4253. Four different

charging and discharging modes are available at TIMER:

1. 5

µA slow charge; initial timing and shutdown cooling

delay.

2. (200

µA + 8 • IDRN) fast charge; circuit breaker delay.

3. 5

µA slow discharge; circuit breaker “cool-off” and

shutdown cooling.

4. Low impedance switch; resets the TIMER capacitor

after an initial timing delay, in UVLO, in UV and in OV

during initial timing and when RESET is high.

For initial timing delay, the 5

µA pull-up is used. The low

impedance switch is turned off and the 5

µA current source

is enabled when the interlock conditions are met. CT

charges to 4V in a time period given by:

•

(2)

When CT reaches VTMRH ( 4V), the low impedance switch

turns on and discharges CT. A GATE start-up cycle begins

and both SS and GATE outputs are released.

CIRCUIT BREAKER TIMER OPERATION

If the SENSE pin detects more than 50mV drop across RS,

the TIMER pin charges CT with (200µA + 8 • IDRN). If CT

charges to 4V, the GATE pin pulls low and the LTC4253

latches off. The LTC4253 remains latched off until the

RESET pin is momentarily pulsed high, the UV pin is

momentarily pulsed low, the TIMER pin is momentarily

discharged low by an external switch or VIN dips below

UVLO and is then restored. The circuit breaker timeout

period is given by:

DRN

µ+

200

•

(3)

(Refer to Block Diagram)

If VOUT < 6.15V, an internal PMOS isolates DRAIN pin

leakage current and this makes IDRN = 0 in Equation (3). If

VOUT is above 7V (VDRNCL) during the circuit breaker fault

period, the charging of CT is accelerated by 8 • IDRN of

Equation (1).

Intermittent overloads may exceed the 50mV threshold at

SENSE but, if their duration is sufficiently short, TIMER

will not reach 4V and the LTC4253 will not shut the external

MOSFET off. To handle this situation, the TIMER dis-

charges CT slowly with a 5µA pull-down whenever the

SENSE voltage is less than 50mV. Therefore any intermit-

tent overload with VOUT < 6.15V and an aggregate duty

cycle of 2.5% or more will eventually trip the circuit

breaker and shut down the LTC4253. Figure 4 shows the

circuit breaker response time in seconds normalized to

µF. The asymmetric charging and discharging of CT is a

fair gauge of MOSFET heating.

The normalized circuit response time is estimated by:

DRN

()

••

() −

[]

200 8

(4)

FAULT DUTY CYCLE, D (%)

0.1

0.01

100

4253 F04

CT(µF)

(200 + 8 • IDRN) • D – 5

Figure 4. Circuit Breaker Response Time

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