1996 Mar 22

14

Philips Semiconductors

Product specification

Microcontrollers for TV and video (MTV)

83C145; 83C845

83C055; 87C055

12 SOFTWARE ANALOG-TO-DIGITAL FACILITY

Figure 6 shows the software analog-to-digital facility block diagram. The block includes Special Function Register SAD.

12.1

Special Function Register SAD

Table 12 Special Function Register SAD format (address D8H)

Table 13 Description of SAD bits

76543210

VHi

CH1

CH0

St

SAD3

SAD2

SAD1

SAD0

BIT

SYMBOL

DESCRIPTION

7

VHi

The comparator output bit; bit addressable.

6

CH1

The channel field controls which pin, if any, is connected to this facility; see Table 14.

5

CH0

4

St

The St bit should be written as a logic 1 in order to initiate a voltage comparison.

3 to 0

SAD3 to SAD0 4 LSBs of the SAD register.

12.2

Software ADC operation

Port pins P1.0/ADI0 to P1.2/ADI2 can be alternately

selected as inputs of a linear voltage comparator. The

other input of the comparator is connected to a 4-bit DAC.

This DAC is controlled by bits SAD3 to SAD0 and

produces a reference voltage:

nominally 0.15625 to 4.84375 V in increments of

0.3125 V.

The output of the comparator (HIGH or LOW) can be read

by the program as the MSB of the SAD register i.e. bit VHi.

After writing St = 1, the program should include intervening

instructions totalling at least 6 machine cycles (72 clock

periods or 6

µs at 12 MHz), before the instruction that

accesses and tests VHi.

Table 14 Pin selection: P1.n/ADIn

Note

1. Port 1 has open-drain drivers which will not materially

affect an analog voltage as long as any and all pins

used for software analog-to-digital measurement have

corresponding logic 1s in the port register; n = 0, 1, 2.

CH1

CH0

0

0

none

0

1

P1.0/ADI0

1

0

P1.1/ADI1

1

1

P1.2/ADI2