83C145 datasheet(29/40 Pages) PHILIPS

29 / 40 page

1996 Mar 22

Philips Semiconductors

Product speciﬁcation

Microcontrollers for TV and video (MTV)

83C145; 83C845

83C055; 87C055

14.5

EPROM Programming and Veriﬁcation

VDD =5V ±10%; VSS =0V; Tamb =21to27 °C.

Note

1. Address should be valid at least 24tCLCL before the rising edge of P0.0 (VPP).

SYMBOL

PARAMETER

MIN.

MAX.

UNIT

1/tCLCL

Oscillator/clock frequency

1.2

MHz

tAVGL(1)

Address setup to P0.1 (PROG) LOW

10 + 24tCLCL

−µs

tGHAX

Address hold after P0.1 (PROG) HIGH

48tCLCL

−µs

tDVGL

Data setup to P0.1 (PROG) LOW

38tCLCL

−µs

tGHDX

Data hold after P0.1 (PROG) HIGH

36tCLCL

−µs

tSHGL

VPP setup to P0.1 (PROG) LOW

−µs

tGHSL

VPP hold after P0.1 (PROG) HIGH

−µs

tGLGH

P0.1 (PROG) width

110

µs

tAVQV(1)

VPP (VDD) LOW to data valid

−

48tCLCL

µs

tGHGL

P0.1 (PROG) HIGH to P0.1 (PROG) LOW

−µs

tSYNL

P0.0 (sync pulse) LOW

4tCLCL

−µs

tSYNH

P0.0 (sync pulse) HIGH

8tCLCL

−µs

tMASEL

ASEL HIGH time

13tCLCL

−µs

tHAHLD

Address hold time

2tCLCL

−µs

tHASET

Address setup to ASEL

13tCLCL

−µs

tADSTA

Low address to address stable

13tCLCL

−µs

Fig.11 Program/Verify cycle.

handbook, full pagewidth

tMASEL

tHASET

tHAHLD

tAVQV

tGHDX

tDVGL

tADSTA

tGLGH

tGHGL

tGHSL

tSHGL

P0.0 [V (p-p)]

P0.1 (PROG)

P0.2 (ASEL)

PORT 2

PORT 3

5 V

12.75 V

5 V

µs MIN

25 PULSES

HIGH ADDRESS

LOW ADDRESS

INVALID DATA

VALID DATA

INVALID DATA

DATA TO BE

PROGRAMMED

verify mode

program mode

MBE769

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