ADS1113 datasheet(23/50 Pages) TI

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8.5.3 Writing To and Reading From the Registers

To access a specific register from the ADS111x-Q1, the controller must first write an appropriate value to register

address pointer bits P[1:0] in the Address Pointer register. The Address Pointer register is written to directly after

the target address byte, low R/W bit, and a successful target acknowledgment. After the Address Pointer register

is written, the target acknowledges, and the controller issues a STOP or a repeated START condition.

When reading from the ADS111x-Q1, the previous value written to bits P[1:0] determines the register that is

read. To change which register is read, a new value must be written to P[1:0]. To write a new value to P[1:0], the

controller issues a target address byte with the R/W bit low, followed by the Address Pointer register byte. No

additional data has to be transmitted, and a STOP condition can be issued by the controller. The controller can

now issue a START condition and send the target address byte with the R/W bit high to begin the read. Figure

8-9 details this sequence. If repeated reads from the same register are desired, there is no need to continually

send the Address Pointer register, because the ADS111x-Q1 store the value of P[1:0] until modified by a write

operation. However, for every write operation, the Address Pointer register must be written with the appropriate

values.

Frame 1: Target Address Byte

Frame 2: Address Pointer Register

Start By

Controller

ACK By

ADS1113/4/5-Q1

ACK By

ADS1113/4/5-Q1

Frame 3: Target Address Byte

Frame 4: Data Byte 1 Read Register

Start By

Controller

ACK By

ADS1113/4/5-Q1

ACK By

Controller

(2)

From

ADS1113/4/5-Q1

SDA

SCL

R/W

SDA

(Continued)

SCL

(Continued)

SDA

(Continued)

SCL

(Continued)

(1)

R/W

D15 D14 D13

D12 D11 D10

Frame 5: Data Byte 2 Read Register

Stop By

Controller

ACK By

Controller

(3)

From

ADS1113/4/5-Q1

Stop By

Controller

The values of A0 and A1 are determined by the ADDR pin.

The controller can leave SDA high to terminate a single-byte read operation.

The controller can leave SDA high to terminate a two-byte read operation.

Figure 8-9. Timing Diagram for Reading From the ADS111x-Q1

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ADS1113-Q1, ADS1114-Q1, ADS1115-Q1

SBAS563E – DECEMBER 2011 – REVISED DECEMBER 2022

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Product Folder Links: ADS1113-Q1 ADS1114-Q1 ADS1115-Q1

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