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ADM1067ASU Datasheet(PDF) 29 Page - Analog Devices

Part # ADM1067ASU
Description  Super Sequencer with Open-Loop Margining DACs
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADM1067ASU Datasheet(HTML) 29 Page - Analog Devices

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ADM1067
Rev. B | Page 29 of 32
SMBus PROTOCOLS FOR RAM AND EEPROM
The ADM1067 contains volatile registers (RAM) and nonvolatile
registers (EEPROM). User RAM occupies Address 0x00
to Address 0xDF; EEPROM occupies Address 0xF800 to
Address 0xFBFF.
Data can be written to and read from both RAM and EEPROM
as single data bytes. Data can be written only to unprogrammed
EEPROM locations. To write new data to a programmed loca-
tion, it must first be erased. EEPROM erasure cannot be done at
the byte level. The EEPROM is arranged as 32 pages of 32 bytes
each, and an entire page must be erased.
Page erasure is enabled by setting Bit 2 in the UPDCFG register
(Address 0x90) to 1. If this bit is not set, page erasure cannot
occur, even if the command byte (0xFE) is programmed across
the SMBus.
WRITE OPERATIONS
The SMBus specification defines several protocols for different
types of read and write operations. The following abbreviations
are used in Figure 33 to Figure 41.
•
S
Start
•
P
Stop
•
R
Read
•
W Write
•
A
Acknowledge
•
A
No acknowledge
The ADM1067 uses the following SMBus write protocols.
Send Byte
In a send byte operation, the master device sends a single
command byte to a slave device, as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts ACK on SDA.
4.
The master sends a command code.
5.
The slave asserts ACK on SDA.
6.
The master asserts a stop condition on SDA and the
transaction ends.
In the ADM1067, the send byte protocol is used for two
purposes:
•
To write a register address to RAM for a subsequent single
byte read from the same address, or a block read or write
starting at that address, as shown in Figure 33.
24
13
5
SLAVE
ADDRESS
RAM
ADDRESS
(0x00 TO 0xDF)
SW A
A
6
P
Figure 33. Setting a RAM Address for Subsequent Read
•
To erase a page of EEPROM memory. EEPROM memory
can be written to only if it is unprogrammed. Before
writing to one or more EEPROM memory locations that
are already programmed, the page or pages containing
those locations must first be erased. EEPROM memory is
erased by writing a command byte.
•
The master sends a command code that tells the slave
device to erase the page. The ADM1067 command code
for a page erasure is 0xFE (1111 1110). Note that, for a
page erasure to take place, the page address has to be given
in the previous write word transaction (see the Write
Byte/Word section). In addition, Bit 2 in the UPDCFG
register (Address 0x90) must be set to 1.
24
13
SLAVE
ADDRESS
COMMAND
BYTE
(0xFE)
SW
A
A
5
6
P
Figure 34. EEPROM Page Erasure
As soon as the ADM1067 receives the command byte, page
erasure begins. The master device can send a stop command
as soon as it sends the command byte. Page erasure takes ap-
proximately 20 ms. If the ADM1067 is accessed before erasure
is complete, it responds with a no acknowledge (NACK).
Write Byte/Word
In a write byte/word operation, the master device sends a
command byte and one or two data bytes to the slave device,
as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts ACK on SDA.
4.
The master sends a command code.
5.
The slave asserts ACK on SDA.
6.
The master sends a data byte.
7.
The slave asserts ACK on SDA.
8.
The master sends a data byte (or asserts a stop condition at
this point).
9.
The slave asserts ACK on SDA.
10. The master asserts a stop condition on SDA to end the
transaction.
In the ADM1067, the write byte/word protocol is used for three
purposes:
•
To write a single byte of data to RAM. In this case, the
command byte is the RAM address from 0x00 to 0xDF and
the only data byte is the actual data, as shown in Figure 35.
SLAVE
ADDRESS
RAM
ADDRESS
(0x00 TO 0xDF)
S
W A
DATA
AP
A
24
13
5
7
6
8
Figure 35. Single Byte Write to RAM



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