Datasheet

11

155 Mbps SDH/SONET/ATM Transceiver — LXT6155

43

ROFP/

CMIERR

DO

TTL

Receive Output Frame Pulse. In hardware mode (HWSEL =Low), this

pin is asserted (High) on the last A2 byte in the (A1.....A1, A2.....A2)

sequence in the RPOD<7:0> traffic. A1=1111,0110 and A2=0010,1000 in

binary. In software mode (HWSEL = High), this position is

programmable. During coax operation, when frame detection is disabled

(RIFE = 0 in HW/Reg #12, bit3 = 0), or in serial mode, this pin indicates

CMI line code errors. These pulses are 50 ns wide (active high). One or

more errors in 16 consecutive bits will causes a single pulse.

44

LOCK

DO

TTL

Receive Output PLL Lock. A High indicates receive PLL has locked to

incoming data. A Low indicates receive PLL is not locked.

45

LOS

DO

TTL

Loss of Signal. An alarm output signal (high) indicating incoming signal

voltage is weak or incoming data does not contain enough transitions. In

software mode (HWSEL = 1) this pin can be configured to combine LOS

and LOCK alarms.

46

RAVCC

S

Receive Analog Power Supply.

47

ATST

-

Analog Test. For factory test purposes only; do not connect.

48

VBIAS

AI

Analog

Bias Input Voltage. This pin requires a 15K (1%) pull-down resistor to

RAGND.

49

RXISH

A0

Analog

Rx PLL External Cap. Connecting a capacitor to RAGND from this pin

controls the Rx PLL transfer function. This pin requires a 330nF cap to

RAGND.

50

RAGND

S

Receive Analog Ground.

51

RRING

AI

Analog

Receive Input Data, positive (RTIP) and negative (RRING).Accepts

incoming signals (LVPECL or CMI) from the line interface.

52

RTIP

53

RAGND

S

Receive Analog Ground.

54

ADDR0/RLIS

DI

TTL

Address 0, software mode (HWSEL = High). This pin together with

ADDR1 sets the chip select address. Up to 4 LXT6155 chips can be

addressed by the

µP interface.

Remote Loopback Input Select, hardware mode (HWSEL =Low).

Together with LLIS sets LXT6155 in a loopback test mode. See Table 4

55

ADDR1/LLIS

DI

TTL

Address 1, software mode (HWSEL = High). This pin together with

ADDR0 sets the chip select address. Up to 4 LXT6155 chips can be

addressed by the

µP interface.

Local Loopback Input Select, hardware mode (HWSEL =Low).

Together with RLIS sets the LXT6155 in remote loopback mode. See

Table 4

56

HWSEL

DI

TTL

Hardware/Software Mode Select.When HWSEL = High, LXT6155

enters software (host) mode, and is ready to communicate with a serial

microprocessor. When HWSEL = Low, LXT6155 operates in hardware

standalone mode (without a serial

µP).

57

SUB

S

Reserved. Must be connected to GND.

58

WELL

S

Reserved. Must be connected to VCC.

59

TGND

S

Transmit Analog Ground.

60

TRING0

AO

Transmit Output Data, positive (TTIP0) and negative (TRING0).

Differential CMI driver outputs for coax interface.

61

TTIP0

Table 1.

LXT6155 Pin Descriptions (Continued)

Pin #

Symbol

Description

1. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output; AI/O = Analog Input/Output; S=Supply.

2. TTL = Transistor-to-Transistor Logic (5V tolerant); LVPECL = Low-Voltage positive ECL.