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LXT6155LE Datasheet(PDF) 39 Page - Intel Corporation

Part # LXT6155LE
Description  155 Mbps SDH/SONET/ATM Transceiver
PDF  50 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

LXT6155LE Datasheet(HTML) 39 Page - Intel Corporation

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Datasheet
39
155 Mbps SDH/SONET/ATM Transceiver — LXT6155
Table 29. Transmit Analog Characteristics
Parameters
Note
Min
Typ
1
Max
Unit
Test Conditions
Transmit jitter generation
2
(Intrinsic jitter SONET spec)
12 kHz - 1.3 MHz
0.1
UIpp
PRBS(23) pattern. Transmit
input data and clock have no
input jitter. Receive line input is
all zeros.
0.01
UIrms
Transmit jitter generation
2
(Intrinsic jitter SDH spec)
500 Hz - 1.3 MHz
1.5
UIpp
65 kHz - 1.3 MHz
0.075
UIpp
Transmit jitter transfer function
peaking2
DC - 230 kHz
0.4
dB
PRBS(23) data. Input jitter as
shown inFigure26.
Synthesizer capture range
Fcap
-20
+20
ppm
parallel mode
Synthesizer track range
Ftrack
-20
+20
ppm
Synthesizer lock time
Tlock
100
µs
Transmit output rise and fall times
- CMI signals
TTIP0
TRING0
2.2
ns
10% - 90%
0m cable length
Transmit output amplitude - CMI
signals
TTIP0
TRING0
0.9
1.1
Vpp
TTIP0/TRING0
output impedance
Zout
1.6
2.0
k
1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing.
2. Not production tested, guaranteed by design and other correlation factors.
Table 30. Receive Timing Characteristics (See Figures 20 and 21)
Parameter
Sym
Min
Typ
1
Max
Unit
Test Conditions
Receive serial output clock
frequency
RSOCLKp
RSOCLKn
155.52
MHz
Receive serial output clock duty
cycle
RSOCLKdc
45
55
%
Receive serial output clock and
data rise/fall time2
-1.2
ns
20% - 80%.
RSOCLKP/RSOCLKN to RPOS/
RNEG propagation delay
RSOCLKpd
-0.5
1.5
ns
Receive parallel output clock
frequency
RPOCLK
19.44
MHz
Receive parallel output clock duty
cycle
RPOCPdc
45
55
%
Receive parallel output data &
clock rise/fall time
RPOCLKt
2
5
ns
RPOCLK to RPOD<0:7>
propagation delay
RPOCLKpd
0
7
ns
RPOCLK to ROFP propagation
delay
ROFPpd
0
4
ns
Reference Input Clock into
XTALIN pin (TTL)
REFCLK
19.44
MHz
The REFCLK replaces the
crystal
1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing.
2. Not production tested, guaranteed by design and other correlation factors.



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