LXT6155LE datasheet(32/50 Pages) INTEL

32 / 50 page

LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver

Datasheet

Table 22. Read-only Register #15 (Address A<3:0>=1111)

Value of:

stat_cont

Status Output

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

(Status

Analog LOS

Digital LOS

Tx clock

activity

alarm status

SONET

OOF signal

Unused3

Rx PLL

frequency

lock alarm

Unused3

Not for customer use

(Fuse

contents-

upper bits)

Not for customer use

(Fuse

contents-

upper bits)

Not for customer use

051,2

(Interrupt

Analog LOS

interrupt

(los_ana_i)

Digital LOS

interrupt

(los_dig_i)

Tx clock

alarm

interrupt

OOF

interrupt

(oof_i)

Unused3

Rx PLL

frequency

lock alarm

interrupt

(rx_lock_i)

CMI coding

error alarm

interrupts

(cmi_err_i)

064

(Device ID)

MSB

LSB

1. Bits 7:1 are cleared upon reading the status register (stat_cont = 00).

2. Bit 0 is cleared upon reading interrupt register (stat_cont = 05).

3. Ignore these bits during register transactions, unpredictable contents

4. Contains device revision number in hexadecimal notation.

LXT6155LE Datasheet(PDF) 32 Page - Intel Corporation

LXT6155LE Datasheet(HTML) 32 Page - Intel Corporation

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