LXT6155LE datasheet(14/50 Pages) INTEL

14 / 50 page

LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver

Datasheet

Figure 2. LXT6155 System Interface

2.1.2.1

CMI Encoding

Coded Mark Inversion (CMI) is an encoding scheme adopted by SONET STS-3 and SDH STM1

standards. CMI encoding guarantees at least one transition per bit, thereby enhancing the clock

recovery process. CMI encodes a “0” with a midpoint positive transition, and a “1” as Low or

High, in opposite polarity to the previous encoded “1”. Refer to Figures 6, 24 and 25 for encoding

and pulse template information.

2.1.3

Tx Clock Monitoring

The LXT6155 provides transmit clock monitoring for both serial and parallel operating modes.

When using the crystal clock as a reference, the LXT6155 monitors the TSICLKP/TSICLKN or the

TPICLK input(s) for transitions. If no transition is seen within 200ns, the tx_clk_alarm flag will be

set (reg #15) and the transmitter outputs ttip1/tring1 or ttip0/tring0 will stop sending data to the line.

This condition will remain until the LXT6155 detects clock transitions at the transmitter input(s)

TSICLKP/TSICLKNorTPICLK. Transmit clockmonitoring canbe disabledinsoftware mode

only.

In remote loopback, transmit clock monitoring is disabled in SW and HW mode. In SW mode, when

using transmit clocks as the receive PLL reference, the user must disable transmit clock monitoring

by setting reg#1bit <0> low.

2.2

Receiver

2.2.1

Analog Front End and Timing Recovery

2.2.1.1

CMI Mode

Received data on RTIP/RRING goes through an adaptive equalizer. An adaptive

equalizer and

adaptive Automatic Gain Control (AGC) compensate the frequency-and-cable length dependent

loss in data signal, and reshapes the signal to the optimal waveform. A Phase Locked Loop (PLL)

µ Processor

(optional)

LXT6155

Fiber Optic Modules

or Coax Transformers

SONET/SDH

Overhead

Terminator

ATM UNI

Data/Clock (8-bit parallel or serial mode)

Receive Output Frame Pulse (ROFP)

Receive Ouput PLL Lock (LOCK)

Loss of Signal (LOS)

System Interface

Line Interface

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