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LXT6155LE Datasheet(PDF) 26 Page - Intel Corporation |
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LXT6155LE Datasheet(HTML) 26 Page - Intel Corporation |
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26 / 50 page ![]() LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 26 Datasheet 3.0 Register Definitions There are a total of sixteen (16) control registers in the LXT6155 addressed by the lowest four address bits, A<3:0>. See Tables 8 through 22 for details . Table 6. Device Address/Control Byte A<6:0> Description A<6:5> LXT6155 Device Select. By using pins ADDR1 and ADDR0, up to four LXT6155 devices can be addressed. For a successful data transaction to occur, A6 and A5 must match the polarity settings on ADDR1 and ADDR0, respectively. Using these controls, up to four LXT6155 devices can be independently controlled. A4 Not Used. Set to 0 during transactions. A<3:0> LXT6155 Register Map (see Table 7). Table 7. LXT6155 Register Map (A<3:0>) Register # A<3:0> Register Name Type 0 0000 Primary Control R/W 1 0001 Transmit Control R/W 2 0010 Transmit PLL1 R/W 3 0011 Transmit PLL2 R/W 4 0100 Equalizer load R/W 5 0101 Equalizer/AGC R/W 6 0110 Matching filter2 R/W 7 0111 Slicer R/W 8 1000 Receive PLL 1 R/W 9 1001 Receive PLL 2 R/W 10 1010 Test R/W 11 1011 Reset and Bias R/W 12 1100 Receive Digital 1 R/W 13 1101 Receive Digital 2 R/W 14 1110 Status/Interrupt Control R/W 15 1111 Status/Interrupt Output Read-only |
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