RT1025

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is a registered trademark of Richtek Technology Corporation

www.richtek.com

DS1025-01

July

2022

10

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

CLOCK

External Clock DC Range

DC_XTAL

0

--

2.8

V

External Clock Voltage

V_XTAL

400

--

--

mVpp

External Clock Tolerance

TOLXTAL

−100

--

100

ppm

Others

DIO

Input Logic-High

VIH

0.65 x

VDD

--

VDD+

0.3

V

Input Logic-Low

VIL

−0.3

--

0.35x

VDD

V

Output Logic-High, Push-Pull

VOH

IOH = -1mA

0.75 x

VDD

--

--

V

Output Logic-Low, Push-Pull

VOL

IOL = 1mA

--

--

0.25x

VDD

V

SPI / I2C

Input Logic-High

VIH

0.65 x

VDD

--

VDD

+ 0.3

V

Input Logic-Low

VIL

−0.3

--

0.35 x

VDD

V

Output Logic-High, Push-Pull

VOH

IOH =

−1mA

0.75 x

VDD

--

--

V

Output Logic-Low, Push-Pull

VOL

IOL = 1mA

--

--

0.25 x

VDD

V

I2C SCL Clock Rate

fSCL

--

--

400

kHz

SPI CLK Clock Rate

fSPI_CLK

--

--

2

MHz

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These

are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect

device reliability.

Note 2.

θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high

effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.

Note 3. Devices are ESD sensitive. Handling precautions are recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. LED external boost voltage – VLED (off state =

no leakage current) ≤ AVDD_HV node voltage (3.4V to 4.2V).

Note 6.

TXP/TXN node voltage ≤ AVDD_HV node voltage ≤ 4.5V.