RT1025WS datasheet(14/24 Pages) RICHTEK

14 / 24 page

RT1025

is a registered trademark of Richtek Technology Corporation

www.richtek.com

DS1025-01

July

2022

greater than 1

µs.

SCK

MOSI

MISO

CMD Field (1 byte)

DATA Field (n byte)

CMD Field (1 byte)

DATA Field (n byte)

Command 1

Command 2

Setup Time

Hold Time

Idle Time

The SPI slave control flow is shown in below.

Start

Config Read/Write

CMD

Read Status

CMD

CFG SUCCESS =1 &

TXRX_FIFO_RDY = 1

Write Status CMD

(clear RD_ERR/

WR_ERR)

Read/Write Data

CMD

SPI Transmission

Read Status

CMD

RDWR_FINISH =1 &

RD_ERR/WR_ERR = 0

End

First, SPI slave controller transmits “config-read/write”

command to configure the transfer data length and

read/write address of the memory. After the SPI slave

is configured, it can send/receive data package with

SPI master by “read/write-data” command. In each

state, SPI master transmits “read-status” command to

poll SPI slave situation. If SPI master detects error flag

bit of state, it should send “write-status” command to

clear the bit and poll this bit until it turns low.

CMD Field [7:0]

Default Code

Data Field

Usage

Read Data (RD)

0x81

N Bytes. Burst data payload

Master read data

Write Data (WD)

0x06

N Bytes. Burst data payload

Master write data

Read Status (RS)

0x0A

1 Byte

Master read slave status

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