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ES9826 Datasheet(PDF) 15 Page - ESS Technology,Inc

Part # ES9826
Description  32-bit High performance 2 Channel ADC w/PGA
PDF  88 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9826 Datasheet(HTML) 15 Page - ESS Technology,Inc

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ES9826 Datasheet
VERSION 0.1.2
15
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM
Digital Features
Digital Signal Path
32
32
32
ADC
DATA
32
SABRE ADC DIGITAL PATH (2 CHANNEL)
8x Decimating Filter
Bypass
Bypass
THD
Compensation
DC
Block
IIR1
0,+6dB,
+12dB,
+18dB,
+24dB,
+30dB
GAIN
PCM/TDM/
SPDIF
4x FIR
2x FIR
Bypass
Volume
Control &
Mixing
IIR2
Bypass
Bypass
IIR3
Bypass
Peak
Threshold
PDM
DATA
Peak
Interrupt
Peak
Detector
Volume Control
This volume control is intended for use during audio capture. Each channel can be digitally attenuated from 0dB to –90dB.
The maximum volume 0dB corresponds to CHx_VOLUME – 16’h7FFF.
The minimum volume -90dB corresponds to CHx_VOLUME – 16’h0001.
Muting the ADC output can be accomplished by setting the CHx_VOLUME to zero (16’h0000).
• 16’h8000 (0dB) to 16’hFFFF (-90dB) inverts the phase of the volume.
Channel volumes, by default, are updated as soon as the volume registers are written. The volume control can be updated
by VOLUME_RATE by setting the ramp rate.
Volume Control Registers
• Register 46-45: CH1_VOLUME
• Register 48-47: CH2_VOLUME
• Register 49: VOLUME_RATE
Volume control is available for PCM, S/PDIF and TDM formats.
Peak Detect
The peak detector is configurable through software registers. GPIOs can output the peak detection on a per channel basis.
Applicable Registers:
• Register 38: PEAK DETECTOR CONFIG
• Register 39: CH1 PEAK THRESHOLD
• Register 40: CH2 PEAK THRESHOLD
• Register 224: PEAK FLAG READ (flag set if input signal peak level is greater than peak threshold)



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