ES9826 datasheet(53/88 Pages) ESS

53 / 88 page

ES9826 Datasheet

VERSION 0.1.2

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM

Bits

[7]

[6]

[5:4]

[3]

[2]

[1]

[0]

Default

1'b0

2'b00

1'b0

Bits

Mnemonic

Description

[7]

INT_MASK_CH2_ARE_ENGAGED

Masks the ARE_ENGAGED_CH2 interrupt.

• 1'b0: Interrupt masked (default)

• 1'b1: Interrupt enabled

[6]

INT_MASK_CH1_ARE_ENGAGED

Masks the ARE_ENGAGED_CH1 interrupt.

• 1'b0: Interrupt masked (default)

• 1'b1: Interrupt enabled

[5:4]

RESERVED

[3]

INT_MASK_CH2_PEAK_DET

Masks the PEAK_FLAG interrupt on ADC CH2.

• 1'b0: Interrupt masked (default)

• 1'b1: Interrupt enabled

[2]

INT_MASK_CH1_PEAK_DET

Masks the PEAK_FLAG interrupt on ADC CH1.

• 1'b0: Interrupt masked (default)

• 1'b1: Interrupt enabled

[1]

INT_MASK_CH2_PEAK_LATCH

Masks the latched PEAK_FLAG interrupt on ADC CH2.

• 1'b0: Interrupt masked (default)

• 1'b1: Interrupt enabled

[0]

INT_MASK_CH1_PEAK_LATCH

Masks the latched PEAK_FLAG interrupt on ADC CH1.

• 1'b0: Interrupt masked (default)

• 1'b1: Interrupt enabled

Bits

[39:0]

Default

40'd0

Bits

Mnemonic

Description

[39:0]

SPDIF_CS

Configures S/PDIF sub-code bits.

ES9826 Datasheet(PDF) 53 Page - ESS Technology,Inc

ES9826 Datasheet(HTML) 53 Page - ESS Technology,Inc

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