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TPS274C65AS Datasheet(PDF) 5 Page - Texas Instruments |
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TPS274C65AS Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 87 page ![]() ADDCFG DSPI 40 39 38 37 36 35 34 33 32 31 10 9 8 7 6 5 4 3 2 1 GND SCLK SDO SDI CS FLT VDD GND 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 REG_EN DO_EN DNC DNC DNC DNC DNC DNC DNC PowerPAD™ DNC Figure 6-2. RHA Package, 40-Pin VQFN, BS Version (Top View) 6.1 Pinout - Version AS & BS Do Not Connect for pins labeled DNC Pin Number TPS274C65AS TPS274C65BS Type Description 1 READY DNC(2) O Logic low output indicating the IC is ready for SPI data transmission (connect to GND pin of the IC with resistor) 2 FLT FLT O Fault output – on any (one or more) channel - open drain, needs to be pulled up to VDD pin 3 DO_EN DO_EN I Setting this pin low would disable all of the outputs. Set high to enable SPI based output Internal pull-down 4 VDD(1) VDD(1) P Logic Supply Input(1) 5,21 GND GND -- Device ground 6 ISNS DNC(2) O SNS current output – use a parallel RC network to the GND pin of the IC. 7 SDO SDO I SPI Data Output from the device 8 SDI SDI I SPI device (secondary) data input 9 SCLK SCLK O SPI Clock Input 10 CS CS I SPI Chip select 11 RCB3 DNC(2) O Gate connection for reverse current blocking FET Ch3 12,13 OUT3 OUT3 O Output voltage for channel 3 14-17 VS VS P 24V Switch Supply input to the IC www.ti.com TPS274C65 SLVSFZ2B – APRIL 2023 – REVISED OCTOBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TPS274C65 |
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