TPS274C65AS datasheet(49/87 Pages) TI

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Table 9-11. TPS274C65 Registers (continued)

Offset

Acronym

Section

2Ah

EN_SHRT_VS

Enable Output Short_to-VS fault per channel

Section 9.6.42

2Bh

ADC_ISNS_DIS

ADC conversion disable ISNS channels

Section 9.6.43

2Ch

ADC_TSNS_DIS

ADC conversion disable TSNS channels

Section 9.6.44

2Dh

ADC_VSNS_DIS

ADC conversion disable VSNS channels

Section 9.6.45

2Eh

ADC_CONFIG1

ADC configuration - disable conversion

Section 9.6.46

2Fh

CRC_CONFIG

Configure CRC

Section 9.6.47

Complex bit access types are encoded to fit into small table cells. Table 9-12 shows the codes that are used for

access types in this section.

Table 9-12. TPS274C65 Access Type Codes

Access Type

Code

Description

Read Type

Read

to Clear

Write Type

Write

Reset or Default Value

-n

Value after reset or the default

value

9.6.1 FAULT_TYPE_STAT Register (Offset = 0h) [Reset = 80h]

FAULT_TYPE_STAT is shown in Table 9-13.

Return to the Summary Table.

The register reports the fault type in any of the channels (OR of all channels)

Table 9-13. FAULT_TYPE_STAT Register Field Descriptions

Bit

Field

Type

Reset

Description

SUPPLY_FLT

The bit is set if either the VDD_UVLO or VS_UV are faults occur. If

FLT_LTCH_DIS bit is set, then the fault bit is latched and is cleared

only when the FLT_GLOBAL_TYPE register is read and the fault

condition no longer exists.

0h = no UV fault in VDD, VINT or VS

1h = UV fault in VDD, VINT or VS

RVRS_BLK_FLT

The bit is set if there is a reverse current fault in any one of the

channels. If FLT_LTCH_DIS bit is set, then the fault bit is latched and

is cleared only when the RVRS_BLK_CH_STAT register is read and

the fault condition no longer exists.

0h = no reverse current blocking fault in any of the channels

1h = reverse current blocking fault in one of the channels

CHAN_TSD

The bit is set if there is a thermal shutdown fault due to thermal

overload in any one of the channels. If FLT_LTCH_DIS bit is

set, then the fault bit is latched and is cleared only when the

THERMAL_SD_CH_STAT register is read and the fault condition no

longer exists.

0h = no thermal shutdown fault in any of the channels

1h = thermal shutdown fault in one of the channels

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TPS274C65

SLVSFZ2B – APRIL 2023 – REVISED OCTOBER 2023

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