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TPS274C65AS Datasheet(PDF) 67 Page - Texas Instruments |
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TPS274C65AS Datasheet(HTML) 67 Page - Texas Instruments |
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67 / 87 page  Table 9-51. FAULT_MASK Register Field Descriptions Bit Field Type Reset Description 7 MASK_SPI_ERR R/W 0h The bit is set to mask the SPI error (SPI_ERR) signaling in the FLT pin output and FAULT_TYPE_STAT register 0h = SPI error is signaled in FAULT_TYPE_STAT register and FLT pin 1h = FLT pin not impacted by SPI error, but SPI error will be signaled through FAULT_TYPE_STAT register 6 MASK_WD_ERR R/W 0h The bit is set to mask the SPI watchdog error (WD_ERR) signaling in the FLT pin output and FAULT_TYPE_STAT register 0h = SPI watchdog error is signaled in FAULT_TYPE_STAT register and FLT pin 1h = FLT pin not impacted by SPI error, but watchdog error will be signaled through FAULT_TYPE_STAT register 5 MASK_ILIMIT R/W 0h The bit is set to mask the signaling ILIMIT fault on the FLT pin 0h = Fault is signaled on the FLT pin on current limit occuring 1h = Current limit fault is not signaled (masked from) on the FLT pin 4 MASK_RVRS_BLK R/W 0h The bit is set to mask the signaling reverse current fault on the FLT pin 0h = Fault is signaled on the FLT pin on reverse current fault occuring 1h = Reverse current fault is not signaled (masked from) on the FLT pin 3 MASK_SHRT_VS R/W 0h The bit is set to mask the signaling off-state Short to VS fault on the FLT pin 0h = Short to VS Fault is signaled on the FLT pin on detecting the fault with the diagnostic 1h = Short to VS fault is not signaled (masked from) on the FLT pin 2 MASK_WB_OFF R/W 0h The bit is set to mask the signaling off-state wire-break fault on the FLT pin 0h = Off-state wire-break fault is signaled on the FLT pin on detecting the fault with the diagnostic 1h = Off-state wire-break fault is not signaled (masked from) on the FLT pin 1 MASK_WB_ON R/W 0h The bit is set to mask the signaling on-state wire-break fault on the FLT pin 0h = On-state wire-break fault is signaled on the FLT pin on detecting the fault with the diagnostic 1h = On-state wire-break fault is not signaled (masked from) on the FLT pin 0 MASK_VS_UV R/W 0h The bit is set to mask the supply voltage VS UV fault signaling on the FLT pin output. 0h = VS UV fault is signaled on the FLT pin on detecting the fault with the diagnostic 1h = VS UV fault is not signaled (masked from) on the FLT pin 9.6.40 EN_WB_OFF Register (Offset = 28h) [Reset = 00h] EN_WB_OFF is shown in Table 9-52. Return to the Summary Table. Enables diagnostic of the wire-break (off-state) faults in the fault registers Table 9-52. EN_WB_OFF Register Field Descriptions Bit Field Type Reset Description 7-4 RESERVED R 0h Reserved 3 WB_OFF_CH4_EN R/W 0h Set this bit to 1 to enable the wire-break (off-state) fault in CH4 0h = Wire-break (off-state) fault diagnostic in CH4 not enabled 1h = Wire-break (off-state) fault diagnostic in CH4 is enabled www.ti.com TPS274C65 SLVSFZ2B – APRIL 2023 – REVISED OCTOBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 67 Product Folder Links: TPS274C65 |
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