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AD9949 Datasheet(PDF) 7 Page - Analog Devices

Part # AD9949
Description  12-Bit CCD Signal Processor with Precision Timing Core
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9949 Datasheet(HTML) 7 Page - Analog Devices

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AD9949
Rev. B | Page 7 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9949
TOP VIEW
1
D1
D8
D7
D6
D5
DRVDD
DRVSS
D4
D3
D2 2
3
4
5
6
7
8
9
10
30
REFB
RG
RGVDD
TCVSS
TCVDD
CLI
AVDD
CCDIN
AVSS
REFT
29
28
27
26
25
24
23
22
21
PIN 1
INDICATOR
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Type1
Description
1 to 4
D1 to D4
DO
Data Outputs
5
DRVSS
P
Digital Driver Ground
6
DRVDD
P
Digital Driver Supply
7 to 13
D5 to D11
DO
Data Outputs (D11 is MSB)
14
H1
DO
CCD Horizontal Clock 1
15
H2
DO
CCD Horizontal Clock 2
16
HVSS
P
H1 to H4 Driver Ground
17
HVDD
P
H1 to H4 Driver Supply
18
H3
DO
CCD Horizontal Clock 3
19
H4
DO
CCD Horizontal Clock 4
20
RGVSS
P
RG Driver Ground
21
RG
DO
CCD Reset Gate Clock
22
RGVDD
P
RG Driver Supply
23
TCVSS
P
Analog Ground for Timing Core
24
TCVDD
P
Analog Supply for Timing Core
25
CLI
DI
Master Clock Input
26
AVDD
P
Analog Supply for AFE
27
CCDIN
AI
Analog Input for CCD Signal (Connect through Series 0.1 µF Capacitor)
28
AVSS
P
Analog Ground for AFE
29
REFT
AO
Reference Top Decoupling (Decouple with 1.0 µF to AVSS)
30
REFB
AO
Reference Bottom Decoupling (Decouple with 1.0 µF to AVSS)
31
SL
DI
3-Wire Serial Load
32
SDI
DI
3-Wire Serial Data Input
33
SCK
DI
3-Wire Serial Clock
34
VD
DI
Vertical Sync Pulse
35
HD
DI
Horizontal Sync Pulse
36
DVSS
P
Digital Ground
37
DVDD
P
Digital Supply
38
HBLK
DI
Optional HBLK Input
39
CLP/PBLK
DO
CLPOB or PBLK Output
40
D0
DO
Data Output LSB
1 Type: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.



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