33970 datasheet(30/36 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33970

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

DEFAULT MODE

Default mode refers to the state of the 33970 after an

internal or external reset prior to SPI communication. An

internal reset occurs during VDD power-up or if VPWR falls

below 4.0 V. An external reset is initiated by the RST pin

driven to a logic [0]. With the exception of the RTZCR full step

time, all of the specific pin functions and internal registers will

operate as though all of the addressable configuration

of the outputs will be disabled after a power-up or external

reset, and SO flag ST6 is set, indicating an undervoltage

event. Anytime an external reset is exerted and the default is

restored, all configuration parameters (e.g., clock calibration,

maximum speed, RTZ parameters, etc.) are lost and must be

reloaded.

FAULT LOGIC REQUIREMENTS

The 33970 device indicates each of the following faults as

they occur:

• Overtemperature fault

• Undervoltage VPWR

• Overvoltage VPWR

• Clock out of spec

These fault bits remain enabled until they are clocked out

of the SO pin with a valid SPI message.

Overcurrent faults are not reported directly; however, it is

likely an overcurrent condition will become a thermal issue

and be reported.

OVERTEMPERATURE FAULT REQUIREMENTS

The 33970 incorporates overtemperature protection

circuitry, which shuts off the affected gauge driver when

excessive temperatures are detected. In the event of a

thermal overload, the affected gauge driver is automatically

disabled. The overtemperature fault is flagged via the OT0

and/or OT1 device status bits. The indicating flag continues

to be set until the affected gauge is successfully re-enabled,

provided the junction temperature has fallen to a temperature

below the hysteresis level.

OVERVOLTAGE FAULT REQUIREMENTS

The device is capable of surviving VPWR voltages within

the maximum specified in Table 2. VPWR levels resulting in

an Overvoltage Shutdown condition can result in uncertain

pointer positions. Therefore, the pointer position should be

re-calibrated. The master will be notified of an overvoltage

event via the SO pin if the device status is selected.

Overvoltage detection and notification occurs regardless of

whether the gauge(s) are enabled or disabled.

OVERCURRENT FAULT REQUIREMENTS

Output currents are limited to safe levels allowing the

device to rely on thermal shutdown to protect itself.

UNDERVOLTAGE FAULT REQUIREMENTS

Undervoltage VPWR conditions may result in uncertain

pointer positions. Therefore, the internal clock and the pointer

position may require re-calibration. The state machine

continues with VPWR voltage levels as low as 4.0 V; however,

the coil voltages may be clipped. The master can be notified

of an undervoltage event via the SO pin. Undervoltage

detection and notification are disabled if both outputs are

disabled.

RESET (SLEEP MODE)

The device can reset internally or externally. If the VDD

level falls below the VDDUV level (refer to the Static Electrical

Characteristics table under POWER INPUT, page 5), the

device resets and powers up in the Default mode. Similarly,

If the RST pin is driven to a logic [0], the device resets to its

default state. The device consumes the least amount of

current (IDD and IPWR) when the RST pin is logic 0]. This is

also referred to as the Sleep mode.

33970 Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc

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