H838024 datasheet(146/697 Pages) RENESAS

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Section 4 Clock Pulse Generators

Rev. 7.00 Mar 10, 2005 page 104 of 652

REJ09B0042-0700

System

clock

oscillator

Subclock

oscillator

Subclock

divider

(1/2, 1/4, 1/8)

System

clock

divider

(1/2)

System

clock

divider

Prescaler S

(13 bits)

Prescaler W

(5 bits)

OSC1

Latch

On-chip

oscillator

Internal reset signal (other than watchdog timer or low-voltage detect

circuit reset)

IRQAEC

OSC2

System clock pulse generator

Subclock pulse generator

φOSC

(fOSC)

ROSC

φW

(fW)

φW/2

φW/4

φSUB

φW

φ/2

φ/8192

φW/2

φW/4

φW/8

φW/128

φW/8

φOSC/2

φOSC/16

φOSC/32

φOSC/64

φOSC/128

Figure 4.2 Block Diagram of Clock Pulse Generators (H8/38124 Group)

4.1.2

System Clock and Subclock

The basic clock signals that drive the CPU and on-chip peripheral modules are

φ and φ

SUB. Four

of the clock signals have names:

φ is the system clock, φ

SUB is the subclock,

OSC is the oscillator

clock, and

W is the watch clock.

The clock signals available for use by peripheral modules are

φ/2, φ/4, φ/8, φ/16, φ/32, φ/64,

φ/128, φ/256, φ/512, φ/1024, φ/2048, φ/4096, φ/8192, φ

W/2,

W/4,

W/8,

W/16,

W/32,

W/64,

and

W/128. The clock requirements differ from one module to another.

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