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H838024 Datasheet(PDF) 317 Page - Renesas Technology Corp

Part # H838024
Description  Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series
PDF  697 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838024 Datasheet(HTML) 317 Page - Renesas Technology Corp

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Section 9 Timers
Rev. 7.00 Mar 10, 2005 page 275 of 652
REJ09B0042-0700
TCF Increment Timing
TCF is incremented by clock input (internal clock or external event input).
a. Internal clock operation
Bits CKSH2 to CKSH0 or CKSL2 to CKSL0 in TCRF select one of four internal clock
sources (
φ/32, φ/16, φ/4, or φw/4) created by dividing the system clock (φ or φw).
b. External event operation
External event input is selected by clearing CKSL2 to 0 in TCRF. TCF can increment on
either the rising or falling edge of external event input. External event edge selection is set by
IEG3 in the interrupt controller’s IEGR register. An external event pulse width of at least 2
system clocks (
φ) is necessary. Shorter pulses will not be counted correctly.
TMOFH/TMOFL Output Timing
In TMOFH/TMOFL output, the value set in TOLH/TOLL in TCRF is output. The output is
toggled by the occurrence of a compare match. Figure 9.6 shows the output timing.
φ
TMIF
(when IEG3 = 1)
Count input
clock
TCF
OCRF
TMOFH TMOFL
Compare match
signal
NN
N
N
N+1
N+1
Figure 9.6 TMOFH/TMOFL Output Timing



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