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PM4332 Datasheet(PDF) 97 Page - PMC-Sierra, Inc |
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PM4332 Datasheet(HTML) 97 Page - PMC-Sierra, Inc |
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97 / 446 page ![]() PRELIMINARY PM4332 TE-32 DATA SHEET PMC-2011402 ISSUE 1 HIGH DENSITY 32 CHANNEL T1/E1/J1 FRAMER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR THE INTERNAL USE OF ITS CUSTOMERS 88 Register 0x0002: Global Configuration Bit Type Function Default Bit 7 R/W MINTE 0 Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 Unused X Bit 2 Unused X Bit 1 R/W SYSOPT[1] 1 Bit 0 R/W SYSOPT[0] 0 MINTE: The Master Interrupt Enable allows internal interrupt statuses to be propagated to the interrupt output. If MINTE is logic 1, INTB will be asserted low upon the assertion of an interrupt status bit whose individual enable is set. If MINTE is logic 0, INTB is unconditionally high-impedance. SYSOPT[1:0]: The System Side Options bits, SYSOPT[1:0], configure the system side interface of the TE-32. The possible system side interface selections are H- MVIP backplane interfaces, Scaleable Bandwidth Interconnect bus interface and a combination SBI bus with CAS or CCS H-MVIP interface. The following table shows the SYSOPT[1:0] values for each system side interface configuration: SYSOPT[1:0] System Interface Mode 00 Reserved 01 H-MVIP Interface 10 SBI Interface (default) 11 SBI Interface with CAS or CCS H-MVIP Interface |
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