PM4332 datasheet(10/446 Pages) PMC

10 / 446 page

PRELIMINARY

PM4332 TE-32

DATA SHEET

PMC-2011402

ISSUE 1

HIGH DENSITY 32 CHANNEL T1/E1/J1 FRAMER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR THE INTERNAL USE OF ITS CUSTOMERS

FEATURES

• High Density 32 channel T1/E1/J1 framer.

• Software selectable between T1/J1 or E1 operation on a per device basis.

• Supports 8 Mbit/s H-MVIP on the system interface for all T1 or E1 links, a

separate 8 Mbit/s H-MVIP system interface for all T1 or E1 CAS channels and

a separate 8 Mbit/s H-MVIP system interface for all T1 or E1 CCS and

V5.1/V5.2 channels.

• Supports a byte serial Scaleable Bandwidth Interconnect (SBI) bus interface

for high density system side device interconnection of up to 32 T1 streams, 32

E1 streams.

• Provides jitter attenuation in the T1 or E1 receive and transmit directions.

• Provides three independent de-jittered T1 or E1 recovered clocks for system

timing and redundancy.

• Provides per link diagnostic and line loopbacks.

• Also provides PRBS generators and detectors on each tributary for error

testing at DS1, E1 and NxDS0 rates as recommended in ITU-T O.151 and

O.152.

• Provides a generic 8-bit microprocessor bus interface for configuration,

control and status monitoring. Provides a standard 5 signal P1149.1 JTAG

test port for boundary scan board test purposes.

• Low power 1.8V/3.3V CMOS technology. All pins are 5V tolerant.

• 324-pin fine pitch PBGA package (23mm x 23mm). Supports industrial

temperature range (-40 oC to 85 oC) operation.

• Line side interface is SBI bus.

• System side interface is either H-MVIP or SBI bus.

Each one of 32 T1 receiver sections:

• Frames to DS-1 signals in SF, SLC96 and ESF formats.

PM4332 Datasheet(PDF) 10 Page - PMC-Sierra, Inc