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STAC9766 Datasheet(PDF) 70 Page - Integrated Device Technology |
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STAC9766 Datasheet(HTML) 70 Page - Integrated Device Technology |
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70 / 97 page  STAC9766/9767 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING PC AUDIO IDT™ 70 STAC9766/9767 V 7.4 12/06 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING 8.4.2. PCI SVID (62h Page 01h) Register 24h must be set to Page 01h to access this register. Default: FFFFh Note: This register is populated by the BIOS and does not reset on RESET#. 8.4.3. PCI SSID (64h Page 01h) Register 24h must be set to Page 01h to access this register. Default: FFFFh 12-8 CL4:CL0 CODEC Compatibility Class (RO) This is a CODEC vendor specific field to define software compatibility for the CODEC. Software read this field together with CODEC vendor ID (reg 7C-7Eh) to determine vendor specific programming interface compatibility. Software can rely on vendor specific register behavior to be compatible among vendor CODECs of the same class. 00h - Field not implemented 01h-1Fh - Vendor specific compatibility class code Equals Vendor ID2(Reg 7Eh) bits D7 to D0 7-0 RV7:RV0 Revision ID: (RO) This register specifies a device specific revision identifier. The value is chosen by the vendor. Zero is an acceptable value. This field should be viewed as a vendor defined extension to the CODEC ID. This number changes with new CODEC stepping of the same CODEC ID. Equals Major Rev bits (Reg 6Ch) bits D7 to D0. D15 D14 D13 D12 D11 D10 D9 D8 PVI15 PVI14 PVI13 PVI12 PVI11 PVI10 PVI9 PVI8 D7 D6 D5 D4 D3 D2 D1 D0 PVI7 PVI6 PVI5 PVI4 PVI3 PVI2 PVI1 PVI0 Bit(s) Reset Value Name Description 15-0 PVI15:PVI0 PCI Sub System Vendor ID: This field provides the PCI Sub System Vendor ID of the Audio or Modem Sub Assembly Vendor (i.e., CNR manufacturer, Motherboard Vendor). This is NOT the CODEC vendor PCI Vendor ID, nor the AC '97 controller PCI Vendor ID. If data is not available, returns FFFFh. D15 D14 D13 D12 D11 D10 D9 D8 PI15 PI14 PI13 PI12 PI11 PI10 PI9 PI8 D7 D6 D5 D4 D3 D2 D1 D0 PI7 PI6 PI5 PI4 PI3 PI2 PI1 PI0 Bit(s) Reset Value Name Description |
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